SPRUJ85 April   2024

ADVANCE INFORMATION  

  1.   1
  2.   Description
  3.   Key Features
  4. 1LaunchPad Module Overview
    1. 2.1 Introduction
    2. 2.2 Preface: Read This First
      1. 2.2.1 If You Need Assistance
      2. 2.2.2 Important Usage Notes
    3. 2.3 Kit Contents
    4. 2.4 Device Information
      1. 2.4.1 System Architecture Overview
      2. 2.4.2 Security
      3. 2.4.3 Compliance
      4. 2.4.4 BoosterPacks
      5. 2.4.5 Component Identification
  5. 2Hardware Description
    1. 3.1  Board Setup
      1. 3.1.1 Power Requirements
        1. 3.1.1.1 Power Input Using USB Type-C Connector
        2. 3.1.1.2 Power Status LEDs
        3. 3.1.1.3 Power Tree
      2. 3.1.2 Push Buttons
      3. 3.1.3 Boot mode Selection
      4. 3.1.4 IO Expander
    2. 3.2  Functional Block Diagram
    3. 3.3  GPIO Mapping
    4. 3.4  Reset
    5. 3.5  Clock
    6. 3.6  Memory Interface
      1. 3.6.1 OSPI
      2. 3.6.2 Board ID EEPROM
    7. 3.7  Ethernet Interface
      1. 3.7.1 Ethernet PHY #1 - CPSW RGMII/ICSSM
      2. 3.7.2 Ethernet PHY #2 - CPSW RGMII/ICSSM
      3. 3.7.3 LED Indication in RJ45 Connector
    8. 3.8  I2C
    9. 3.9  Industrial Application LEDs
    10. 3.10 SPI
    11. 3.11 UART
    12. 3.12 MCAN
    13. 3.13 FSI
    14. 3.14 JTAG
    15. 3.15 TIVA and Test Automation Header
    16. 3.16 LIN
    17. 3.17 MMC
    18. 3.18 ADC and DAC
    19. 3.19 EQEP and SDFM
    20. 3.20 EPWM
    21. 3.21 BoosterPack Headers
    22. 3.22 Pinmux Mapping
  6. 3Additional Information
    1.     Trademarks
    2. 4.1 Sitara MCU+ Academy
  7. 4References
    1. 5.1 Reference Documents
    2. 5.2 Other TI Components Used in This Design
  8. 5Revision History

2.12 MCAN

The LaunchPad is equipped with a single MCAN Transceiver (TCAN1044VDRBTQ1) that is connected to the MCAN3 interface of the AM263Px SoC. The MCAN Transceiver has two power inputs, VIO is the transceiver 3.3V system level shifting supply voltage and VCC is the transceiver 5V supply voltage. The SoC CAN data transmit data input is mapped to TXD of the transceiver and the CAN receive data output of the transceiver is mapped to the MCAN RX signal of the SoC.

GUID-20240423-SS0I-TB0W-VM70-XF7LRDQ4ZDRL-low.png Figure 2-21 MCAN Transceiver and BoosterPack Header

The system has a 120Ω split termination on the CANH and CANL signals to improve EMI performance. Split termination improves the electromagnetic emissions behavior of the network by eliminating fluctuations in the bus common-mode voltages at the start and end of message transmissions.

The low and high level CAN bus input output lines are terminated to a three pin header.

The standby control signal is an AM263Px SoC GPIO signal. The STB control input has a pullup resistor that is used to have the transceiver be in low-power standby mode to prevent excessive system power. Below is a table that shows the operating modes of the MCAN transceiver based on the STB control input logic.

Table 2-16 MCAN Transceiver Operating Modes
STB Device Mode Driver Receiver RXD Pin
High Low current standby mode with bus wake-up Disabled Low-power receiver and bus monitor enable High (recessive) until valid WUP is received
Low Normal Mode Enabled Enabled Mirrors bus state

MCAN5 is routed to the BoosterPack Header via a 2:1 mux. The mux selects whether ADC inputs or MCAN signals are mapped to the BoosterPack Header.

Table 2-17 MCAN BoosterPack Mux
BP_MUX_SEL Condition Function of Mux
LOW ADC Inputs Selected Port A ↔ Port B
HIGH MCAN TX/RX Selected Port A ↔ Port C