SPRUJ85 April   2024

ADVANCE INFORMATION  

  1.   1
  2.   Description
  3.   Key Features
  4. 1LaunchPad Module Overview
    1. 2.1 Introduction
    2. 2.2 Preface: Read This First
      1. 2.2.1 If You Need Assistance
      2. 2.2.2 Important Usage Notes
    3. 2.3 Kit Contents
    4. 2.4 Device Information
      1. 2.4.1 System Architecture Overview
      2. 2.4.2 Security
      3. 2.4.3 Compliance
      4. 2.4.4 BoosterPacks
      5. 2.4.5 Component Identification
  5. 2Hardware Description
    1. 3.1  Board Setup
      1. 3.1.1 Power Requirements
        1. 3.1.1.1 Power Input Using USB Type-C Connector
        2. 3.1.1.2 Power Status LEDs
        3. 3.1.1.3 Power Tree
      2. 3.1.2 Push Buttons
      3. 3.1.3 Boot mode Selection
      4. 3.1.4 IO Expander
    2. 3.2  Functional Block Diagram
    3. 3.3  GPIO Mapping
    4. 3.4  Reset
    5. 3.5  Clock
    6. 3.6  Memory Interface
      1. 3.6.1 OSPI
      2. 3.6.2 Board ID EEPROM
    7. 3.7  Ethernet Interface
      1. 3.7.1 Ethernet PHY #1 - CPSW RGMII/ICSSM
      2. 3.7.2 Ethernet PHY #2 - CPSW RGMII/ICSSM
      3. 3.7.3 LED Indication in RJ45 Connector
    8. 3.8  I2C
    9. 3.9  Industrial Application LEDs
    10. 3.10 SPI
    11. 3.11 UART
    12. 3.12 MCAN
    13. 3.13 FSI
    14. 3.14 JTAG
    15. 3.15 TIVA and Test Automation Header
    16. 3.16 LIN
    17. 3.17 MMC
    18. 3.18 ADC and DAC
    19. 3.19 EQEP and SDFM
    20. 3.20 EPWM
    21. 3.21 BoosterPack Headers
    22. 3.22 Pinmux Mapping
  6. 3Additional Information
    1.     Trademarks
    2. 4.1 Sitara MCU+ Academy
  7. 4References
    1. 5.1 Reference Documents
    2. 5.2 Other TI Components Used in This Design
  8. 5Revision History

BoosterPack Headers

GUID-20240411-SS0I-VFWP-7DSW-XWJWJDCX6JMM-low.pngFigure 2-31 AM263Px LaunchPad BoosterPack Pinout

Note: This pinout represents the default signals mapped to the BoosterPack Header. Additional signal options for each header are available through Pinmux Mapping. Two signals for one pin represents an externally muxed option

The AM263Px LaunchPad supports two fully independent BoosterPack XL connectors. BoosterPack site #1 (J1/J3, J2/J4) is located in between the SoC and the micro-B USB Connector. BoosterPack site #2 (J5/J7, J6/J8) is located in between the SoC and the RJ45 connectors. Each GPIO has multiple functions available through the GPIO mux. The signals connected from the SoC to the BoosterPack headers include:

  • Various ADC inputs
  • DAC outouts
  • UART5
  • Various GPIO signals
  • SPI0 and SPI1
  • I2C1 and I2C3
  • Various EPWM channels
  • LIN1 and LIN2
  • MCAN1
  • SDFM0