SPRUJ85A April   2024  – August 2024

PRODUCTION DATA  

  1.   1
  2.   Description
  3. 1Key Features
  4. 2LaunchPad Module Overview
    1. 3.1 Introduction
    2. 3.2 Preface: Read This First
      1. 3.2.1 If You Need Assistance
      2. 3.2.2 Important Usage Notes
    3. 3.3 Kit Contents
    4. 3.4 Device Information
      1. 3.4.1 System Architecture Overview
      2. 3.4.2 Security
      3. 3.4.3 Compliance
      4. 3.4.4 BoosterPacks
      5. 3.4.5 Component Identification
  5. 3Hardware Description
    1. 4.1  Board Setup
      1. 4.1.1 Power Requirements
        1. 4.1.1.1 Power Input Using USB Type-C Connector
        2. 4.1.1.2 Power Status LEDs
        3. 4.1.1.3 Power Tree
      2. 4.1.2 Push Buttons
      3. 4.1.3 Boot mode Selection
      4. 4.1.4 IO Expander
    2. 4.2  Functional Block Diagram
    3. 4.3  GPIO Mapping
    4. 4.4  Reset
    5. 4.5  Clock
    6. 4.6  Memory Interfaces
      1. 4.6.1 OSPI
      2. 4.6.2 MMC
      3. 4.6.3 eMMC
      4. 4.6.4 Board ID EEPROM
    7. 4.7  Ethernet Interface
      1. 4.7.1 Ethernet PHY #1 - CPSW RGMII/ICSSM
      2. 4.7.2 Ethernet PHY #2 - CPSW RGMII/ICSSM
      3. 4.7.3 LED Indication in RJ45 Connector
    8. 4.8  I2C
    9. 4.9  Industrial Application LEDs
    10. 4.10 SPI
    11. 4.11 UART
    12. 4.12 MCAN
    13. 4.13 FSI
    14. 4.14 JTAG
    15. 4.15 TIVA and Test Automation Header
    16. 4.16 LIN
    17. 4.17 ADC and DAC
    18. 4.18 EQEP and SDFM
    19. 4.19 EPWM
    20. 4.20 BoosterPack Headers
    21. 4.21 Pinmux Mapping
  6. 4Additional Information
    1.     Trademarks
    2. 5.1 Sitara MCU+ Academy
    3. 5.2 Known Board Changes/Issues
      1. 5.2.1 OSPI DQS and LBCLK nets swap
      2. 5.2.2 XDS110 Debugger Bricking Issue
      3. 5.2.3 eMMC CMD and CLK nets swap
  7. 5References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  8. 6Revision History

4.2.3 eMMC CMD and CLK nets swap

The LP-AM263P has an eMMC footprint on board, for the part MTFC8GAMALBH-AAT. But it is seen that the CMD and CLK nets are wrongly swapped. The correct nets should be connected as per below

  • U61 Pin M6 should be connected to AM263P_EMMC0_CLK_MUX net
  • U61 Pin M5 should be connected to AM263P_EMMC0_CMD_MUX net

Users are suggested to do board re-work before using this eMMC footprint. Please raise an e2e ticket for details on this.