SPRUJ85A April 2024 – August 2024
PRODUCTION DATA
The AM263Px LaunchPad maps two SPI instances (SPI0, SPI1) from the AM263Px SoC to the BoosterPack Headers. Series termination resistors are placed near the SoC for each SPI clock and SPI D0 signal. There is a 2:1 mux (SN74CB3Q3257PWR) that is responsible for selecting SPI signals for proper function. The mux is driven by two GPIO signals that are generated from the AM263Px SoC.
Output Enable (OE) | Select (S) | Input/Output | Function |
---|---|---|---|
Low | Low | A ↔ B1 | A port = B1 port |
Low | High | A ↔ B2 | A port = B2 port |
High | X | Hi-Z | Disconnect |