SPRUJA3 November   2024 F29H850TU , F29H859TU-Q1 , TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28378D , TMS320F28379D

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Feature Differences Between F2837x, F2838x, F28P65x and F29H85x
    1. 1.1 F28x to F29x Feature Change Overview
  5. 2C29x Architecture
    1. 2.1 C29x Architecture Overview
      1. 2.1.1 Peripheral Interrupt Priority and Expansion (PIPE)
      2. 2.1.2 Safety and Security Module (SSU)
      3. 2.1.3 Real-Time DMA (RTDMA)
      4. 2.1.4 Lock-step Compare Module (LCM)
    2. 2.2 C28x vs C29x Architecture Overview
  6. 3PCB Design Consideration
    1. 3.1 VSSOSC
    2. 3.2 JTAG
    3. 3.3 VREF
  7. 4Feature Differences for System Consideration
    1. 4.1 New Features in F29H85x
      1. 4.1.1  Analog Subsystem
      2. 4.1.2  Data Logger and Trace (DLT)
      3. 4.1.3  Single Edge Nibble Transmission (SENT)
      4. 4.1.4  Waveform Analyzer Diagnostic (WADI)
      5. 4.1.5  EPWM
      6. 4.1.6  Bootrom
      7. 4.1.7  ERAD
      8. 4.1.8  XBAR
      9. 4.1.9  Error Signaling Module (ESM)
      10. 4.1.10 Error Aggregator
      11. 4.1.11 Hardware Security Module (HSM)
        1. 4.1.11.1 Cryptographic Accelerators
      12. 4.1.12 Safe Interconnect End-to-End (E2E) Safing
      13. 4.1.13 Critical MMR Safing With Parity
      14. 4.1.14 LPOST
    2. 4.2 Communication Module Changes
    3. 4.3 Control Module Changes
    4. 4.4 Analog Module Differences
    5. 4.5 Power Management
      1. 4.5.1 VREGENZ
      2. 4.5.2 Power Consumption
    6. 4.6 Memory Module Changes
    7. 4.7 GPIO Multiplexing Changes
  8. 5Software Development with F29H85x
    1. 5.1 Migration Report Generation Tool
  9. 6References

2.1.4 Lock-step Compare Module (LCM)

CPU1 and CPU2 instances, including the integrated PIPE and RTDMA will be supported by lock-step mode configuration to detect permanent and transient faults for safety-critical applications. The CPU can be configured as single module (CPU2 not present on the device) or lockstep (CPU1 and CPU2 in lockstep mode) or dual module (CPU1 and CPU2 operating as independent cores, also known as split-lock mode). The lock-step feature is only available on certain device variants. For the device variants that can support lock-step, see the Device Comparison table in the device-specific data sheet. For the full details of the Lock-step Comparator Module section, see the F29H85x and F29P58x Real-Time Microcontrollers Technical Reference Manual.

There are several IPs that are covered by LCM:

  • C29 CPU Subsystem (Includes C29x CPUs, PIPE, Timer, ERAD, and DLT)
  • RTDMA
Table 2-4 Lockstep Module CPU Configuration
CPU1 and CPU2 CPU1 CPU2
Single Core Available Clock Gated
SL (Split-lock) Independent Core Independent Core
LS (Lock-step) Cores operate as single CPU1 in Lock-step Mode