SPRUJA8A January   2024  – September 2024

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1.     Preface: Read This First
      1. 1.1.1 Sitara MCU+ Academy
      2. 1.1.2 If You Need Assistance
    2. 1.1 Introduction
    3. 1.2 Kit Contents
    4. 1.3 Device Information
  6. 2Hardware
    1. 2.1 Component Identification
    2. 2.2 Power Requirements
      1. 2.2.1 Power Tree
    3. 2.3 Functional Block Diagram
    4. 2.4 Header Information
    5. 2.5 Test Points
    6. 2.6 Interfaces
      1. 2.6.1 Ethernet Interface
        1. 2.6.1.1 Industrial Ethernet PHY
        2. 2.6.1.2 Industrial Ethernet PHY Strapping Resistors
        3. 2.6.1.3 LED Indication in RJ45 Connector
        4. 2.6.1.4 Multi-Connector Addressing
    7. 2.7 Integration Guide
      1. 2.7.1 Board Dimensions
      2. 2.7.2 DF40GB Connector
      3. 2.7.3 Mounting Holes
      4. 2.7.4 RJ45 Ethernet Connector
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5References
    1. 5.1 Reference Documents
    2. 5.2 Compatible Sitara™ MCU AM2x EVMs
  10. 6Revision History

2.6.1.4 Multi-Connector Addressing

For Sitara AM2x EVMs with more than one Ethernet add-on board connector, each DP83826-EVM-AM2 requires a different EEPROM I2C address and PHY address. The EEPROM A0 and A2 nets, set by pull resistors on the main Sitara AM2x EVM drive the PHY address nets via a FET network implemented on the DP83826-EVM-AM2. Table 2-5 details the multi-connector I2C and PHY addressing scheme implemented on the add-on PHY board.

Note:
  • The EEPROM I2C address bits A2 and A0 are driven via pull resistors on the main Sitara AM2x EVM. The pull resistors for each enumerated connector follow the table below.
  • EEPROM I2C address bit A1 will always be pulled high to VDDIO on the add-on board
  • The EEPROM I2C address is defined by the following 8 bits: 8b1010[A2][A1][A0][R/W]
  • Pulls to VDDIO/GND are via 10kOhm resistor
  • All EVMs with a single connector are configured as CONNECTOR_0

Table 2-5 Multi-Connector I2C / PHY Addressing Scheme
Connector_# EEPROM_A2 (connector pin 37) EEPROM_A1 EEPROM_A0 (connector pin 47) I2C Address DP83826 PHY Address
Pull A2 Pull A1 Pull A0
CONNECTOR_0 GND 0 VDDIO 1 GND 0 0x52 3b001
CONNECTOR_1 GND 0 VDDIO 1 VDDIO 1 0x53 3b011
CONNECTOR_2 VDDIO 1 VDDIO 1 GND 0 0x56 3b101
CONNECTOR_3 VDDIO 1 VDDIO 1 VDDIO 1 0x57 3b111