SPRUJE8 December   2024 AM2754-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Preface Read This First
      1. 1.2.1 Important Usage Notes
    3. 1.3 Kit Contents
    4. 1.4 Device Information
      1. 1.4.1 Security
    5. 1.5 Audio Expansion Connectors
  6. 2Hardware
    1. 2.1  Component Identification
    2. 2.2  Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
      4. 2.2.4 Power Sequence
      5. 2.2.5 PMIC
    3. 2.3  Reset
    4. 2.4  Clock
    5. 2.5  Boot Mode Selection
    6. 2.6  Header Information
    7. 2.7  Push Buttons
    8. 2.8  Switches
    9. 2.9  Interfaces
      1. 2.9.1 Ethernet Interface
        1. 2.9.1.1 Ethernet Add-on Connectors
      2. 2.9.2 Audio Interfaces
        1. 2.9.2.1 Audio Clocking
        2. 2.9.2.2 McASP
        3. 2.9.2.3 MLB
    10. 2.10 AEC Mapping
      1. 2.10.1 Audio Expansion Connector 1
      2. 2.10.2 Audio Expansion Connector 2
    11. 2.11 Test Points
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 If You need Assistance
    2. 4.2 Trademarks
  9. 5References
    1. 5.1 Reference Documents
    2. 5.2 Other TI Components Used This Design
  10. 6Revision History

2.4 Clock

The AM275x SoC requires a 25 MHz clock input for MCU_OSC0. All reference clocks required for the SoC and the two Ethernet expansion connectors are generated from a single three output clock buffer (LMK1C1103PWR), which is sourced from a single 25MHz LVCMOS Oscillator (LMK6CE25000) by default.

The EVM also requires a 16 MHz clock source for the TM4C129 microcontroller for UART-USB JTAG support, and another 16MHz clock source for the USB-to-UART bridge FTDI chip.

A 32.768KHz low frequency crystal is also available for Real Time Clock (RTC) applications.

AM2754, AM2754-Q1, AM2752, AM2752-Q1 Oscillator Clock Tree Figure 2-11 Oscillator Clock Tree

The SoC clock input can also be sourced from a single 25 MHz crystal. To use the crystal there must be resistors mounted and unmounted. When the crystal is used as a clock source then the AM275x CLKOUT0 (P1) signal is used to source the three output clock buffer for the Ethernet expansion connector reference clock signals.

AM2754, AM2754-Q1, AM2752, AM2752-Q1 Crystal Clock Tree Figure 2-12 Crystal Clock Tree

The following table describes the proper resistors and capacitors to be mounted and DNI'd for each clock source configuration.

Table 2-3 Clock Source
Clock Source Mounted DNI
25 MHz LVCMOS Oscillator (default) R336, R249, R349 R337, R170, R252, R253,C205,C209
25 MHz Crystal R337, R170, R252, R253,C205,C209 R336, R249, R349

The AM275x EVM has three bi-directional Audio external reference clock signals used to provide audio reference clocks from external audio devices to the AM275x Multi Channel Audio Serial Ports (McASP), or from the internal audio clock sources such as McASP high-clocks or the Audio PLL to external audio devices:

  • AUDIO_EXT_REFCLK2
  • AUDIO_EXT_REFCLK1
  • AUDIO_EXT_REFCLK0

AUDIO_EXT_REFCLK2 reference clock signal source is selected through a Multiplexer (TS5A3357QDCURQ1) from three inputs:

  • CPSW_RGMII1_BCLK_1V8 signal, an Ethernet Audio Video Bridging (eAVB) bit clock signal from RGMII Ethernet connector 1 for Audio over ethernet applications.
  • CPSW_RGMII2_BCLK_1V8 signal, an eAVB bit clock signal from RGMII Ethernet connector 2 for Audio over ethernet applications.
  • CDCE_CLK_OUT1 signal, a clock output generated from a clock generator(CDCE6214RGET) that has a 24.576MHz crystal as a clock source.

The AVB bit clock signals from both RGMII Ethernet connectors (CPSW_RGMII1_BCLK) are both level translated by Level Translator (SN74AVC2T244DQMR), from 3.3V to 1.8V before being applied to the Multiplexer inputs.

AUDIO_EXT_REFCLK2_S0 and AUDIO_EXT_REFCLK2_S1 serve as Multiplexer input selection bits for selecting AUDIO_EXT_REFCLK2 clock input.

AM2754, AM2754-Q1, AM2752, AM2752-Q1 Audio_EXT_REFCLK2 Clock Tree Figure 2-13 Audio_EXT_REFCLK2 Clock Tree

The following Truth Table shows the selection options for AUDIO_EXT_REFCLK2 reference clock source:

Table 2-4 AUDIO_EXT_REFCLK2 Selection Truth Table
AUDIO_EXT_REFCLK2_S0 AUDIO_EXT_REFCLK2_S1 AUDIO_EXT_REFCLK2
0 0 –––––––
1 0 CPSW_RGMII2_BCLK_1V8
0 1 CPSW_RGMII1_BCLK_1V8
1 1 CDCE_CLK_OUT1(DEFAULT SELECTION)

AUDIO_EXT_REFCLK1 and AUDIO_EXT_REFCLK0 reference clock signals are selected through the same bi-directional Multiplexer (TMUX1136DQAR) from two options each:

AUDIO_EXT_REFCLK0 is selected from:

  • AEC1_REFCLKOUT, a reference audio clock signal from Audio Expansion Connector 1. If AEC1_REFCLKOUT is selected (Default), it gets output to AUDIO_EXT_REFCLK0 signal.
  • AEC1_REFCLKIN, a reference audio clock to Audio Expansion Connector 1. If AEC1_REFCLKIN is selected, it gets the reference audio clock signal AUDIO_EXT_REFCLK0, from the AM275x SoC.

AUDIO_EXT_REFCLK1 is selected from:

  • AEC2_REFCLKOUT, a reference audio clock signal from Audio Expansion Connector 2. If AEC2_REFCLKOUT is selected, it gets output to AUDIO_EXT_REFCLK1 signal.
  • AEC2_REFCLKIN, a reference audio clock to Audio Expansion Connector 2. If AEC2_REFCLKIN is selected, it gets the reference audio clock signal AUDIO_EXT_REFCLK1, from the AM275x SoC.

AEC1_REFCLK_SEL and AEC2_REFCLK_SEL serve as Multiplexer input selection bits to AUDIO_EXT_REFCLK0 and AUDIO_EXT_REFCLK1 respectively.

AM2754, AM2754-Q1, AM2752, AM2752-Q1 AUDIO_EXT_REFCLK0 and AUDIO_EXT_REFCLK1 Clock Tree Figure 2-14 AUDIO_EXT_REFCLK0 and AUDIO_EXT_REFCLK1 Clock Tree

The following Truth Table shows the selection options for AUDIO_EXT_REFCLK0 and AUDIO_EXT_REFCLK1 reference clock signals:

Table 2-5 AUDIO_EXT_REFCLK0 and AUDIO_EXT_REFCLK1 Selection Truth Table
AECx_REFCLK_SEL AUDIO_EXT_REFCLK0 AUDIO_EXT_REFCLK1
0 AEC1_REFCLKOUT AEC2_REFCLKOUT
1(DEFAULT SELECTION) AEC1_REFCLKIN AEC2_REFCLKIN

A 24.576MHz crystal is also used to provide an Audio clock input OSC1 to the AM275x SoC for applications requiring specific audio frequencies.