SPRUJF5 November   2024 AM2612

ADVANCE INFORMATION  

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Acronyms Used in This Document
  6. 3 ROM Boot Requirements
  7. 4 Application Requirements
  8. 5 Additional Usage Factors
  9. 6 Flash Support in MCU PLUS SDK
  10. 7 Boot Compatible Flash Devices
  11. 8 Tested Flash Devices
  12. 9 Related Documentation From Texas Instruments
  13. 10Revision History

3 ROM Boot Requirements

As Figure 1-2 shows, the boot flow process is a sequence adopted by AM261x that starts upon power-on. ROM code on the R5F is set to work in a certain way which is described in the Initialization chapter of the device-specific Technical Reference Manual. The ROM code expects specific instructions from the flash and expects specific timing and framing configurations for establishing communication. Multiple boot modes are supported in the AM261x device, and ROM code expects the following support:

  • Flash device operating with 1.8V and 3.3V are supported.
  • In OSPI boot mode, the flash must support Octal Output Fast Read (opcode 0x8B) and the 1S-1S-8S transfer protocol.
  • In QSPI boot mode, the flash must support Quad Output Fast Read (opcode 0x6B) and the 1S-1S-4S transfer protocol.
  • Flash device must allow 8 dummy clock cycles for setting up the initial address during the previously-mentioned read operations.
  • Flash device must boot in 1S mode by default.
  • Flash must support 3-byte (24-bit) addressing mode by default.
  • Flash memory size 4MB is recommended as a minimum.

All of this information is available in the data sheet of the flash device being evaluated. A flash device must support all of the points mentioned above to meet AM261x compatibility requirements.