SPRUJG2 December 2024 AM62D-Q1
The Core voltage of the AM62D SoC can be 0.75V or 0.85V based on the PMIC Configuration and on the power optimization requirement. By Default the PMIC is configured to supply VDD_CORE to 0.75V, it can be changed to 0.85V by changing the PMIC Configuration register. Current monitors are provided on all of the SoC Power rails.
The SoC has different I/O groups. Each I/O group is powered by specific power supplies as listed in Table 2-16.
Sl.No | Power Supply | SoC Supply Rails | I/O Power Group | Voltage |
---|---|---|---|---|
1 | VDD_CORE | VDDA_CORE_USB | USB | 0.75/ 0.85 |
VDDA_CORE_CSI | CSI | |||
VDD_CANUART | CANUART | |||
VDD_CORE | CORE | |||
2 | VDDR_CORE | VDDR_CORE | CORE | 0.75 |
3 | VDDA_1V8 | VDDA_1V8_CSIRX | CSI | 1.8 |
VDDA_1V8_USB | USB | |||
VDDA_1V8_MCU | MCU GENERAL | |||
VDDA_1V8_OSCO | OSCO | |||
VDDA_PLL[0:4] | ||||
4 | VDD_LPDDR4 | VDDS_DDR | DDR0 | 1.1 |
VDDS_DDR_C | ||||
5 | CAN_IO_3V3 | VDDSHV_CANUART | CANUART | 3.3 |
6 | VPP_1V8 | VPP_1V8 | 1.8 | |
7 | SoC_VDDSHV5_SDIO | VDDSHV5 | MMC1 | 3.3/ 1.8 |
8 | SOC_DVDD1V8 | VDDSHV1 | OSPI | 1.8 |
VDDSHV4 | MMC0 | |||
VDDSHV6 | MMC2 | |||
VMON_1P8_SOC | ||||
9 | SOC_DVDD3V3 | VDDSHV0 | GENERAL | 1.8 |
VDDSHV3 | GPMC | |||
VDDSHV2 | RGMII | 3.3 | ||
VDDSHV_MCU | MCU GENERAL | |||
VMON_3P3_SOC | ||||
VDDA_3P3_USB | USB |