SPRUJG2 December   2024 AM62D-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
    5. 1.5 EVM Revisions and Assembly Variants
  7. 2Hardware
    1. 2.1  Additional Images
    2. 2.2  Key Features
      1. 2.2.1 Processor
      2. 2.2.2 Power Supply
      3. 2.2.3 Memory
      4. 2.2.4 JTAG/Emulator
      5. 2.2.5 Supported Interfaces and Peripherals
      6. 2.2.6 Expansion Connectors/Headers to Support Application Specific Add‐On Boards
    3. 2.3  Power Requirement
    4. 2.4  Setup and Configuration
      1. 2.4.1 EVM DIP Switches
      2. 2.4.2 Boot modes
      3. 2.4.3 User Test LEDs
    5. 2.5  Power ON/OFF Procedures
      1. 2.5.1 Power ON Procedure
      2. 2.5.2 Power OFF Procedure
      3. 2.5.3 Power Test Points
    6. 2.6  Interfaces
      1. 2.6.1  AM62D Audio EVM Interface Mapping
      2. 2.6.2  Audio Interface
        1. 2.6.2.1 Audio Stereo Lineouts
        2. 2.6.2.2 Audio Microphone / Line In
      3. 2.6.3  JTAG Interface
      4. 2.6.4  UART Interface
      5. 2.6.5  USB Interface
        1. 2.6.5.1 USB2.0 Type-A Interface
        2. 2.6.5.2 USB2.0 Type-C Interface
      6. 2.6.6  MCAN Interface
      7. 2.6.7  Memory Interfaces
        1. 2.6.7.1 LPDDR4 Interface
        2. 2.6.7.2 Octal Serial Peripheral Interface (OSPI)
        3. 2.6.7.3 MMC Interfaces
          1. 2.6.7.3.1 MMC0 - eMMC Interface
          2. 2.6.7.3.2 MMC1 - MicroSD Interface
        4. 2.6.7.4 Board ID EEPROM
      8. 2.6.8  Ethernet Interface
      9. 2.6.9  CPSW Ethernet 1 and CPSW Ethernet 2
      10. 2.6.10 GPIO Port Expander
      11. 2.6.11 GPIO Mapping
    7. 2.7  Power
      1. 2.7.1 Power Input
      2. 2.7.2 Power Supply
      3. 2.7.3 Power Sequencing
      4. 2.7.4 AM62D SOC Power
      5. 2.7.5 Current Monitoring
    8. 2.8  Clocking
      1. 2.8.1 Peripheral Ref Clock
    9. 2.9  Reset
    10. 2.10 CPLD Mapping
    11. 2.11 Audio Expansion Connectors (Headers)
      1. 2.11.1 Audio Expansion Connector 1
      2. 2.11.2 Audio Expansion Connector 2
    12. 2.12 Interrupt
    13. 2.13 I2C Address Mapping
  8. 3Hardware Design Files
  9. 4Compliance Information
    1. 4.1 Compliance and Certifications
  10. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
    2. 5.2 Trademarks

2.6.9 CPSW Ethernet 1 and CPSW Ethernet 2

The CPSW_RGMII1 port and the CPSW_RGMII2 port of the AM62D SoC is terminated to a Expansion connector manufacturer part number DF40C-50DP-0.4V. This provides a flexibility of plugging in either an Industrial Grade Ethernet daughter card or an Automotive Grade Ethernet daughter card. The details of these are captured in the design documents of the respective cards.

Table 2-13 lists out the pinout for the Ethernet Expansion connector.

Table 2-13 CPSW Ethernet 1 & CPSW Ethernet 2 Expansion Connector Pinout
Pin No. Signal I/O Direction Pin No. Signal I/O Direction
1 DGND POWER 25 CPSW_RGMII_RD1 OUTPUT
2 EXT_VMON POWER 26 RGMII_INH OUTPUT
3 CPSW_RGMII_TXC INPUT 27 CPSW_RGMII_RD2 OUTPUT
4 VDD_2V5 POWER 28 CPSW_RGMII_ETH_CLK INPUT
5 DGND POWER 29 CPSW_RGMII_RD3 OUTPUT
6 VDD_2V5 POWER 30 CPLD_CPSW_RGMII_CRS OUTPUT
7 CPSW_RGMII_TD0 INPUT 31 DGND POWER
8 DGND POWER 32 DGND POWER
9 CPSW_RGMII_TD1 INPUT 33 DGND POWER
10 CPSW_RGMII_INTn OUTPUT 34 DGND POWER
11 CPSW_RGMII_TD2 INPUT 35 CPSW_RGMII_TX_EN INPUT
12 RGMII_RSTn INPUT 36 CPSW_RGMII_BRD_CONN_DET OUTPUT
13 CPSW_RGMII_TD3 INPUT 37 I2C_ADDR0_A2 INPUT
14 CPLD_CPSW_RGMII_COL OUTPUT 38 SYNC1_OUT_ETH1 POWER
15 DGND POWER 39 RGMII_RX_ER OUTPUT
16 DGND POWER 40 SoC_I2C0_SCL INPUT
17 DGND POWER 41 DGND POWER
18 DGND POWER 42 SoC_I2C0_SDA BIDIRECTIONAL
19 CPSW_RGMII_RXC OUTPUT 43 RGMII_RX_LINK OUTPUT
20 SoC_RGMII_MDC INPUT 44 VCC_3V3_SYS POWER
21 DGND POWER 45 CPSW_RGMII_RX_DV OUTPUT
22 SoC_RGMII_MDIO BIDIRECTIONAL 46 VCC_3V3_SYS POWER
23 CPSW_RGMII_RD0 OUTPUT 47 I2C_ADDR0_A0 INPUT
24 DGND POWER 48 CPLD_CPSW_RGMII_BCLK OUTPUT