SPRZ398K November   2012  – September 2024 DRA745 , DRA746 , DRA750 , DRA756

 

  1.   1
  2. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  3. 2Silicon Advisories
    1.     Revisions SR 2.0, 1.1, 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i727
    9.     i729
    10.     i734
    11.     i767
    12.     i782
    13.     i783
    14.     i802
    15.     i803
    16.     i807
    17.     i808
    18.     i809
    19.     i810
    20.     i813
    21.     i814
    22.     i815
    23.     i818
    24.     i819
    25.     i820
    26.     i824
    27.     i826
    28.     i829
    29.     i834
    30.     i837
    31.     i840
    32.     i841
    33.     i842
    34.     i843
    35.     i847
    36.     i849
    37.     i852
    38.     i854
    39.     i855
    40.     i856
    41.     i859
    42.     i861
    43.     i862
    44.     i863
    45.     i868
    46.     i869
    47.     i870
    48.     i871
    49.     i872
    50.     i874
    51.     i875
    52.     i878
    53.     i879
    54.     i880
    55.     i881
    56.     i882
    57.     i883
    58.     i884
    59.     i887
    60.     i889
    61.     i890
    62.     i893
    63.     i895
    64.     i896
    65.     i897
    66.     i898
    67.     i899
    68.     i900
    69.     i901
    70.     i903
    71.     i916
    72.     i927
    73.     i929
    74.     i930
    75.     i932
    76.     i933
    77.     i936
    78.     i940
    79.     i2446
  4. 3Silicon Limitations
    1.     Revisions SR 2.0, 1.1, 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i844
    7.     i845
    8.     i848
    9.     i850
    10.     i851
    11.     i853
    12.     i857
    13.     i858
    14.     i876
    15.     i877
    16.     i892
    17.     i909
  5. 4Silicon Cautions
    1.     Revisions SR 2.0, 1.1, 1.0 - Cautions List
    2.     i781
    3. 4.1 107
    4.     i827
    5.     i832
    6.     i836
    7.     i839
    8.     i864
    9.     i885
    10.     i886
    11.     i912
    12.     i926
    13.     i931
    14.     i935
  6. 5Revision History

i881

MLB: Potential for Misaligned Data in Multi-Frame per Sub-Buffer Mode

CRITICALITY

Medium

DESCRIPTION

When using Multi-Frame per Sub-buffer mode for a MediaLB synchronous channel, it is possible for data to become permanently misaligned within the data buffer if one or more MediaLB Channel Addresses are corrupted or not located within the expected physical channel. The misalignment can occur when the channel address becomes corrupted in response to random external events on the bus.

WORKAROUND

Disable the Multi-Frame per Sub-Buffer mode (MFE = 0).

Because of the very low throughput of MediaLB synchronous channels, the impact of this workaround to on-chip bus bandwidth should be minimal. Additionally, this workaround should have no impact with regards to the number of MediaLB interrupts serviced by the CPU.

REVISIONS IMPACTED

SR 2.0, 1.1, 1.0

DRA75x, DRA74x: 2.0, 1.1, 1.0