SPRZ429N July 2014 – July 2024 AM5726 , AM5728 , AM5729
Bandgap Temperature Read Dtemp Can Be Corrupted
Medium
Read accesses to registers listed below can be corrupted due to incorrect resynchronization between clock domains.
Read access to registers below can be corrupted:
Multiple reads to CTRL_CORE_TEMP_SENSOR_MPU/GPU/CORE/DSPEVE/IVA[9:0]:
BGAP_DTEMP_MPU/GPU/CORE/DSPEVE/IVA is needed to discard false value and read right value:
Note: A maximum of three reads is required. Those three reads must be performed within the delay between two consecutive measurements, otherwise, methodology is not conclusive. This delay is configured in the COUNTER_DELAY field of CTRL_CORE_BANDGAP_MASK_1.
SR 2.0, 1.1
TDA2x: 2.0, 1.1, 1.0
DRA75x, DRA74x: 2.0, 1.1, 1.0
AM572x: 2.0, 1.1