SPRZ429N July 2014 – July 2024 AM5726 , AM5728 , AM5729
DPLL_VIDEOn May Require Multiple Lock Attempts
Medium
In rare circumstances the DPLL_VIDEO1 and DPLL_VIDEO2 PLLs may not lock on the first attempt during SoC initialization. When this occurs a subsequent attempt to relock the PLL will result in the PLL successfully locking.
In order to successfully lock the PLL, the following software sequence is recommended:
The PLL will typically lock after the second attempt of the above. However, additional attempts could be required (Step 5 above).
SR 2.0, 1.1
TDA2x: 2.0, 1.1, 1.0
DRA75x, DRA74x: 2.0, 1.1, 1.0
AM572x: 2.0, 1.1