SPRZ452I july 2018 – may 2023 AM6526 , AM6528 , AM6546 , AM6548
PCIE: PCIE1 instance does not support outbound address translation bypass
PCIe module supports an outbound address translation bypass feature by using a CBA interface signal called ASEL. This allows SoC reads and writes through PCIe link to use a PCIe address directly instead of using an SoC level address. Transactions are routed internally to SoC using an ASEL value instead of an SoC address.
There are two PCIe instances, PCIE0 and PCIE1. Each PCIe outbound link is assigned a unique ASEL value: PCIE0 is assigned an ASEL value of 1 and PCIE1 is assigned an ASEL value of 2. Due to an integration issue related to ASEL routing, PCIE1 does not support this capability and all outbound transactions for PCIE1 must use an SoC level address with address translation performed by the PCIe module.
As a result of this issue, DMA is not programmed to send any transactions with ASEL set to 2.
PCIE0 is not affected by this issue and does support outbound address translation bypass capability.
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