SPRZ487E May 2022 – June 2024 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
USART Spurious DMA Interrupts
Spurious DMA interrupts may occur when DMA is used to access TX/RX FIFO with a non-power-of-2 trigger level in the TLR register.
Use power of 2 values for TX/RX FIFO trigger levels (1, 2, 4, 8, 16, and 32).