SPRZ576 November   2024 AM2612

ADVANCE INFORMATION  

  1.   1
  2.   Abstract
  3. 1Usage Notes and Advisories Matrices
  4. 2Silicon Revision 1.0 Usage Notes and Advisories
    1. 2.1 Silicon Revision 1.0 Usage Notes
      1.      i2324
    2. 2.2 Silicon Revision 1.0 Advisories
      1.      i2189
      2.      i2310
      3.      i2311
      4.      i2345
      5.      i2351
      6.      i2352
      7.      i2353
      8.      i2354
      9.      i2356
      10.      i2357
      11.      i2358
      12.      i2359
      13.      i2374
      14.      i2383
      15.      i2411
      16.      i2412
      17.      i2427
      18.      i2428
      19.      i2433
      20.      i2439
      21.      i2440
  5. 3Trademarks
  6. 4Revision History

i2354

CONTROLSS-SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events

Details:

Back-to-back writes to SDCPARMx register bit fields CEVT1SEL, CEVT2SEL, and HZEN within three SD-modulator clock cycles can potentially corrupt the SDFM state machine, resulting in spurious comparator events, which can potentially trigger CPU interrupts, CLA tasks, ePWM XBAR events, and GPIO output X-BAR events if configured appropriately.

Workaround(s):

Avoid back-to-back writes within three SD-modulator clock cycles or have the SDCPARMx register bit fields configured in one register write.