SPRZ580 December 2024 AM62D-Q1
USART Spurious DMA Interrupts
Spurious DMA interrupts may occur when DMA is used to access TX/RX FIFO with a non-power-of-2 trigger level in the TLR register.
Use power of 2 values for TX/RX FIFO trigger levels (1, 2, 4, 8, 16, and 32).