SWAU130A March   2023  – December 2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Hardware Features
    2. 2.2 Connector and Jumper Descriptions
      1. 2.2.1 LED Indicators
      2. 2.2.2 Jumper Settings
      3. 2.2.3 BoosterPack Header Assignment
      4. 2.2.4 JTAG Headers
    3. 2.3 Power
      1. 2.3.1 Measure the CC3301 Current Draw
        1. 2.3.1.1 Low Current Measurement (LPDS)
        2. 2.3.1.2 Active Current Measurement
    4. 2.4 Clocking
    5. 2.5 Performing Conducted Testing
  7. 3Implementation Results
    1. 3.1 Evaluation Setups
      1. 3.1.1 MCU and RTOS
      2. 3.1.2 Processor and Linux
      3. 3.1.3 Standalone RF Testing
        1. 3.1.3.1 Radio Tool BP-CC3301 Hardware Setup
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Revision History

2.2.4 JTAG Headers

The BP-CC3301 was designed with 2 JTAG headers (J10, J11) for SWD interface with the XDS110 debug probe. The signal assignment for these headers are described in the figures and tables below.

The main JTAG interface for the BP-CC3301 is via the LP-XDS110 (ET) that is connected to the 20pin header (J11). A XDS110 debug probe can also interface with this board via a 10-pin header (J10), however this header is not populated with the default kit.

GUID-20231208-SS0I-0NGG-QD36-RBLWTLL1SP06-low.pngFigure 2-4 ARM 10 pin JTAG Connector (J10)
Table 2-5 ARM 10 pin JTAG Connector (J10) Assignment
PinSignal NameDescription
J10.1VCC_BRD_1V81.8V supply for reference voltage to connector
J10.2SWDIOSerial wire data in/out
J10.4SWCLKSerial wire clock
J10.10RESET_1V8nReset (Enable line for CC3301)
J10.3, J10.5, J10.7, J10.9GNDBoard ground
GUID-20231208-SS0I-Q9ZB-QB9Q-2G2MRV8D9DVD-low.svg Figure 2-5 20 pin LP-XDS110 Connector (J11)
Table 2-6 20 Pin LP-XDS110 Connector (J11) Assignment
Pin Signal Name Description
J11.6 SWCLK Serial wire clock
J11.8 SWDIO Serial wire data in/out
J11.10 RESET_1V8 nReset (Enable line for the CC3301)
J11.12 UART_TX_1V8 The CC3301 UART TX to host for BLE host controller interface
J11.14 UART_RX_1V8 The CC3301 UART RX from host for BLE host controller interface
J11.16 VCC_BRD_1V8 1.8V supply for reference voltage to connector
J11.18 VCC_BRD_5V 5 V supply to BP-CC3301 from LP-XDS110
J11.1, J11.7, J11.13, J11.19, J11.20 GND Board ground