SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
The Arm® Cortex®-M4F processor includes an integrated system timer, SysTick, which provides a simple, 24-bit, clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism. The counter can be used in several different ways. For example, the counter can be:
The timer consists of three registers:
When enabled, the timer counts down on each clock from the reload value to 0, reloads (wraps) to the value in the STRVR register on the next clock edge, then decrements on subsequent clocks. Clearing the STRVR register disables the counter on the next wrap. When the counter reaches 0, the COUNTFLAG status bit is set. The COUNTFLAG bit clears on reads.
Writing to the STCVR register clears the register and the COUNTFLAG status bit. The write does not trigger the SysTick exception logic. On a read, the current value is the value of the register at the time the register is accessed.
The SysTick counter runs on the system clock. If this clock signal is stopped for low-power mode, the SysTick counter stops. Ensure that software uses aligned word accesses to access the SysTick registers.
When the processor is halted for debugging, the counter does not decrement.