SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
The IOC allows software to configure the pins based on the requirements of the application. The software can configure different characteristic settings for any or all of the I/O pins. All of the following features, except for output driver (output enable set in the GPIO:DOE31_0 register), are controlled in the IOC:IOCFGn registers:
Configures the drive strength and maximum current of an I/O pin. All I/O pins support 2 mA and 4 mA, while five pins support up to 8 mA. By setting IOC:IOCFGn.IOSTR to 0x0, the drive strength is automatically updated based upon inputs from the battery monitor, BATMON, to maintain the set drive strength level at different battery voltages.
Configures a weak pull on an I/O pin. The following can be set: pullup, pulldown, or no pull. See the data sheet for specific pullup and pulldown resistance.
Sets high or low slew rate on an I/O pin.
Enables or disables input hysteresis on an I/O pin.
Configures the pin as normal, open source, or open drain; all of these can be set to either inverted or normal (noninverted).
Enables interrupt triggered by edge detection on I/O pin. Different edge detection modes are supported, and the possible modes are rising edge, falling edge, trigger on both rising and falling, or no edge detection.
Enables or disables the I/O input driver.
Enables or disables the I/O output driver.