SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
In this scenario the user:
Figure 20-19 shows the scenario for synchronous counter start – ignore 0 stop events.
Table 20-27 lists the associated timing requirements for this scenario.
Description | Label | Requirement |
---|---|---|
Minimum high time | t_minH | 42 ns |
Minimum low time | t_minL | 126 ns |
Minimum delay | t_d | 21 ns |