SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
When the Sensor Controller is not used by the application, the COMPB event can trigger System CPU wakeup in two ways:
Direct wakeup infers minimum wake-up latency. It is however not possible to clear the COMPB event in AON_EVENT as is comes directly from the comparator.
Indirect wakeup infers latency that scales with the SCE clock rate, which depends on the AUX operational mode, as described in Section 20.2.1. The latency is given by a two-stage synchronizer and event flag capture and bounded upwards by three SCE clock periods. The System CPU can clear the event flag on wake up, and hence return to sleep while the COMPB event level that triggered wake up is active. For AUX event interface to the AON domain, see Section 20.6.6.
Because the Sensor Controller is not is not used in this scenario, the System CPU can configure COMPB event as wake-up event source for AUX. This assures low wake-up latency that scales with the 2 MHz clock. For a description, see Section 20.1 and the AUX_SYSIF:PROGWUnCFG registers in Section 20.8.9.
For indirect wakeup, the System CPU application must use the sequence that follows:
When the Sensor Controller is used by the application, it must provide the System CPU wakeup. Setup is done in Sensor Controller Studio.