SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
The CC13x2x7 and CC26x2x7 device platform implements a mechanism to ensure that the external emulator can take control of the device before it executes any application code. This mechanism is called halt in boot (HIB). When HIB detects debug activity, the boot code stops in a wait for interrupt instruction (WFI) at the end of its execution before jumping to the application code in Flash.
Detection of activities on the TCK pin (which powers up the JTAG power domain) is the condition for HIB when next boot occurs. If JTAG power domain is turned off by entering the test logic reset (TLR) state before a system reset occurs, the HIB conditions can be cleared. The HIB conditions are not cleared if JTAG power domain turns off after AON_PMCTL:SHUTDOWN.EN is written to 1.
To exit HIB, the external emulator must connect to the device and first HALT, then RESUME the CPU through DAP. Halting the CPU is a debug event that wakes the CPU from the WFI instruction. After resuming, the program execution continues from the application code.