SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
The two VDDR (regulated) pins are normally powered from one of the internal regulators. For lowest power, TI recommends using the internal DC/DC regulator (see Section 2.3.13.2 for further details on this configuration).
Using the Global LDO is also an option. In this case the two VDDR pins must be tied together. In this case, VDDR should have a 22 µF decoupling capacitor, whereas VDDR_RF should have the decoupling recommended in the various reference designs. In this setup, VDDS_DCDC should be tied to VDDS and DCDC_SW should be left floating.