SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
When the SPO clock polarity control bit is clear, the bit produces a steady-state low value on the SSIn_CLK pin. If the SPO bit is set, the bit places a steady-state high value on the SSIn_CLK pin when data is not being transferred.