SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
The Cortex®-M33 processor supports unaligned accesses. They are converted into two or more aligned AHB transactions on the C-AHB or S-AHB master ports on the processor. Unaligned support is only available for load/store singles (LDR, LDRH, STR, STRH, TBH) to addresses in normal memory. Load/store double and load/store multiple instructions already support word aligned accesses, but do not permit other unaligned accesses, and generate a fault if this is attempted. Unaligned accesses in device memory are not permitted and generate a fault. Unaligned accesses that cross memory map boundaries are architecturally unpredictable.
If CPU_SCB:CCR.UNALIGN_TRP for the current security state is set, any unaligned accesses generate a fault.