SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
There is no retention logic for cryptography registers or the AES key-store. The clocks can be enabled or gated by the following PRCM registers:
To save power, the application can disable the clock to the module when not in use. The module is clock-gated in sleep mode by setting the SECDMACLKGS register CRYPTO_CLK_EN bit. The module can also be clock-gated in run mode by setting the SECDMACLKGR register CRYPTO_CLK_EN bit.