SWRZ092B April 2021 – March 2022 IWR6843AOP
DMA Read From an Unimplemented Address Space is not Reported as a BUS Error
IWR6843AOP ES2.0 only
The MSS DMA should generate a Bus Error (BER) interrupt when the DMA detects an error due to a read from an unimplemented address location. This interrupt is not available on any of the VIM Interrupt Channels for DMA1 and DMA2.
Implication: A DMA read from an unimplemented address can go undetected.
The DMA MPU has to be engaged with valid address range to ensure no occurrence of any read from an invalid address location happens.
DMA transfers have to be covered with end-to-end CRC from source to destination.