SWRZ166 November 2024 AWR2944P
CR4 STC Boot Monitor Failure
AWR2944P, AWR2E44P
Cortex CR4 STC Boot Monitor Failure is observed in the device.
It is recommended to execute a sequence (MSS_CTRL:MSS_PBIST_KEY_RST[3:0] = 0) to clear the PBIST registers before starting CR4 (BSS) execution in the Secondary boot loader (SBL). Refer to the SBL example code provided by TI.