TIDT347 November 2023
Table 2-1 shows the sink mode only efficiency test across different Vsys voltages from input source as well as different battery cell conditions. The fast charge current limit is set to 3 A and input current limit is set to 3 A for 5-V, 9-V, and 15-V input source, and 5 A for 20-V input source.
Battery Cell Setting | Vsys Input Voltage (V) | Vsys (V) | IIN (A) | PIN (W) | Vbat (V) | Ichg (A) | POUT (W) | Efficiency | Power Loss (W) |
---|---|---|---|---|---|---|---|---|---|
10S | 5 | 4.65 | 3.033 | 14.10 | 40.41 | 0.302 | 12.20 | 86.53% | 1.90 |
10S | 9 | 8.87 | 3.008 | 26.68 | 40.52 | 0.605 | 24.51 | 91.88% | 2.17 |
10S |
15 |
14.95 |
3.006 |
44.94 |
40.62 |
1.037 |
42.12 |
93.73% |
2.82 |
10S |
20 |
19.17 |
4.95 |
94.89 |
40.88 |
2.224 |
90.92 |
95.81% |
3.97 |
7S |
5 |
4.65 |
3.031 |
14.09 |
24.49 |
0.518 |
12.69 |
90.01% |
1.41 |
7S |
9 |
8.88 |
3.008 |
26.71 |
24.62 |
1.016 |
25.01 |
93.65% |
1.70 |
7S |
15 |
14.96 |
3.005 |
44.95 |
24.78 |
1.73 |
42.87 |
95.36% |
2.09 |
7S |
20 |
19.33 |
3.943 |
76.22 |
25.02 |
2.937 |
73.48 | 96.41% |
2.73 |
4S |
5 |
4.66 |
3.032 |
14.13 |
14.6 |
0.889 |
12.98 | 91.86% |
1.15 |
4S |
9 |
8.89 |
3.008 |
26.74 |
14.8 |
1.711 |
25.32 | 94.70% |
1.42 |
4S |
15 |
14.96 |
3.006 |
44.97 |
15.02 |
2.88 |
43.26 | 96.19% |
1.71 |
4S |
20 |
19.58 |
2.344 |
45.90 |
14.98 |
2.938 |
44.01 | 95.89% |
1.88 |