TIDUEW7 May   2020

 

  1.    Description
  2.    Resources
  3.    Features
  4.    Applications
  5.    Design Images
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Processor – i.MX 6ULL Applications Processor
      2. 2.2.2 i.MX 6ULL Memory Interfaces
        1. 2.2.2.1 DDR3L
        2. 2.2.2.2 Quad SPI NOR Flash
        3. 2.2.2.3 eMMC iNAND
        4. 2.2.2.4 SD Card Connector
      3. 2.2.3 USB to UART Converter
      4. 2.2.4 USB Ports
      5. 2.2.5 LCD Screen Connector
      6. 2.2.6 JTAG Header
      7. 2.2.7 USB2ANY Header
      8. 2.2.8 Functional Switches and Status LEDs
      9. 2.2.9 GPIO Expansion Connector
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS6521815 - Power Management IC
      2. 2.3.2 DP83849I - Dual Ethernet PHY
      3. 2.3.3 INA3221 - Current Monitor
      4. 2.3.4 Reset Scheme
      5. 2.3.5 TPS2054B, TPS22964C - Auxiliary Load Switches
    4. 2.4 System Design Theory
      1. 2.4.1 Power Estimation
      2. 2.4.2 Power Sequencing
      3. 2.4.3 I2C Device Chain
      4. 2.4.4 Clock Scheme
      5. 2.4.5 BOOT Configuration
      6. 2.4.6 PCB Floor Planning
  8. 3Getting Started, Testing Setup, and Test Results
    1. 3.1 Getting Started with Hardware and Software
      1. 3.1.1 Hardware
        1. 3.1.1.1 On-board LED Information
      2. 3.1.2 Software
        1. 3.1.2.1 Booting of TIDA-050043
        2. 3.1.2.2 Example Linux Commands for Testing TIDA-050043
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 CAD Files
    4. 4.4 Gerber Files
    5. 4.5 Assembly Drawings
  10. 5Software Files
  11. 6Related Documentation
    1. 6.1 Trademarks
    2. 6.2 Third-Party Products Disclaimer

2.4.5 BOOT Configuration

This design uses two sets of BOOT configuration switches. BOOT Mode pins are controlled by SW7 DIP switches that are connected to dedicated BOOT_MODE0 and BOOT_MODE1 input pins of i.MX 6ULL Processor. Along with these, there are 24 different pins for setting Boot Config which shares pins with LCD Data. Of these 24 pins, 4 of them are controlled by the 4 DIP Switches of SW6. All of the possible BOOT options for this design are given in Table 5 (SW7) and Table 6 (SW6). The connections of the DIP switches to the processor are shown in Figure 20

Figure 20. BOOT Mode and Configuration DIP Switches TIDA-050043 tida-050043-boot-switch-tiduew7.gif

Table 5. SW7 BOOT Mode Settings

SW7, PIN 1 SW7, PIN 2
BOOT Type BOOT_MODE[1] BOOT_MODE[0]
Boot from Fuses 0 0
Serial Download 0 1
Internal BOOT 1 0
Reserved 1 1

Table 6. SW6 BOOT Config Settings

SW6, PIN 4 SW6, PIN 3 SW6, PIN 2 SW2, PIN 1
BOOT Device BOOT_CFG1[7] BOOT_CFG1[6] BOOT_CFG1[5] BOOT_CFG1[0](2)
QSPI 0 0 0 x
SD, eSD, SDXC 0 1 0 x
eMMC(1) 0 1 1 x
(1) To select boot device as eMMC, an assembly change must also be performed. See schematic for details.
(2) BT_CFG1[0] is used for SD loopback clock selection.