Voltage sensing happens at three points in the inverter signal path to aid in control: before and after the primary output relay and at the positive and negative bus voltages. By enabling measurement on both sides of the relay, the control system can lock into the grid voltage and frequency before connecting, thus preventing any mismatch issues. Similarly, sensing of the positive and negative bus voltages help in fine adjusting the duty cycle separately during the positive and negative half cycle to prevent any bus voltage mismatch.

All three sensing topologies are similar. First, PGND is used as a virtual neutral using a resistor network. The high voltage signal is attenuated using a series of large value resistances. An offset of 1.65 V is added to the attenuated neutral point to center the voltage signal in the middle of the input range of the TLV9004, and the attenuated value from the phase voltage is measured using the ADC within the C2000™ MCU. Figure 2-10 shows this sensing arrangement.

Figure 2-10 High-Voltage Sensing Signal Path