TIDUF06 August   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 PCB and Form Factor
      2. 2.2.2 Power Supply Design
        1. 2.2.2.1 POC Filter
        2. 2.2.2.2 Power Supply Considerations
          1. 2.2.2.2.1 Choosing External Components
          2. 2.2.2.2.2 Choosing the Buck 1 Inductor
          3. 2.2.2.2.3 Choosing the Buck 2 and Buck 3 Inductors
          4. 2.2.2.2.4 Functional Safety
    3. 2.3 Highlighted Products
      1. 2.3.1 DS90UB953-Q1
      2. 2.3.2 TPS650330-Q1
      3. 2.3.3 IMX623
    4. 2.4 System Design Theory
  8. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Required Hardware
      1. 3.1.1 Hardware Setup
      2. 3.1.2 FPD-Link III I2C Initialization
      3. 3.1.3 IMX623 Initialization
    2. 3.2 Testing and Results
      1. 3.2.1 Test Setup
        1. 3.2.1.1 Power Supplies Startup
        2. 3.2.1.2 Power Supply Startup – 1.8 V Rail and Serializer PDB Setup
      2. 3.2.2 Test Results
        1. 3.2.2.1 Power Supplies Start Up
        2. 3.2.2.2 Power Supply Output Voltage Ripple
        3. 3.2.2.3 Power Supply Load Currents
        4. 3.2.2.4 I2C Communications
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 PMIC Layout Recommendations
      2. 4.3.2 PCB Layer Stackup
      3. 4.3.3 Serializer Layout Recommendations
      4. 4.3.4 Imager Layout Recommendations
      5. 4.3.5 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  10. 5Related Documentation
  11. 6Trademarks
2.2.2.2.1 Choosing External Components

For simplicity, the efficiency of the buck regulators is assumed to be 80% for the operating conditions listed in Table 2-1, while the efficiency of the LDO is given by Equation 1:

Equation 1. ηLDO=VOUTVIN=3.33.8=0.87

Equation 2, which calculates the input power of a converter as a function of the output power and efficiency, is used to calculate the system and Buck 1 output currents.

Equation 2. PIN=VIN×IIN=POUTη
Equation 3. IOUT, Buck1=POUT, Buck2ηBuck2+POUT, Buck3ηBuck3+POUT, LDOηLDOVOUT, Buck1=341 mA

Table 2-2 shows the load capability of each regulator compared to the requirements of the camera module. The TPS650330-Q1 device is capable of supplying the system power with plenty of margin to account for variations between typical and maximum current variation.

Table 2-2 TPS650330-Q1 Capabilities vs. System Requirements
REGULATOR OUTPUT VOLTAGE (V) MAXIMUM CURRENT (mA) REQUIRED CURRENT (mA)
Buck 1 3.8 1500 341
Buck 2 1.8 1200 237
Buck 3 1.1 1200 383
LDO

3.3

 300 79

After determining that the TPS650330-Q1 device is suitable based on the power requirements, the external components can be chosen quickly based on the data sheet recommendations, simplifying the design process. These recommendations are shown in Figure 2-9 and Table 2-3.

Figure 2-9 Typical Application
Table 2-3 TPS650330-Q1 Recommended Components
COMPONENTDESCRIPTIONVALUEUNIT
CVSYS,VSYS_SVSYS and VSYS_S decoupling10µF
CPVIN_B1Buck 1 input capacitor10µF
LSW_B1Buck 1 inductor1.5µH
COUT_B1Buck 1 output capacitor10µF
CPVIN_B2Buck 2 input capacitor10µF
LSW_B2Buck 2 inductor1.0µH
COUT_B2Buck 2 output capacitor10µF
CPVIN_B3Buck 3 input capacitor10µF
LSW_B3Buck 3 inductor1.0µH
COUT_B3Buck 3 output capacitor10µF
CPVIN_LDOLDO input capacitor1.0µF
COUT_LDOLDO output capacitor2.2µF