SBAA495A May 2021 – April 2022 PCM3120-Q1 , PCM5120-Q1 , PCM6120-Q1 , TLV320ADC3120 , TLV320ADC5120 , TLV320ADC6120
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TLV320ADCx120 and PCMx120-Q1 is a family of dual-channel audio analog to digital converters. This device family features a flexible audio serial interface that allows the device to be configured as either a controller or target. This document describes the modes, input parameters, and register coefficients required to configure the TLV320ADCx120 and PCMx120-q1 devices as an audio bus controller.
For I2S-based digital audio communication protocols, the controller device generates the clocks: bit clock (BCLK) and word clock (WCLK) (or frame synchronization, FSYNC). On the other hand, a target device receives the clocks: BCLK and WCLK (or FSYNC) from an external device. In many applications, a host processor with an advanced digital audio interface can act as the audio bus controller with the TLV320ADCx120 and PCMx120-Q1 as a target device. However, having the audio ADC as the audio bus controller is advantageous in the following circumstances:
The following sections describe the modes, input parameters, or register settings required to configure the device as an audio bus controller.