SBAS426H August   2008  – March 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Timing Requirements
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Noise Performance
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  ADC Input and Multiplexer
      2. 9.3.2  Low-Noise PGA
        1. 9.3.2.1 PGA Common-Mode Voltage Requirements
        2. 9.3.2.2 PGA Common-Mode Voltage Calculation Example
        3. 9.3.2.3 Analog Input Impedance
      3. 9.3.3  Clock Source
      4. 9.3.4  Modulator
      5. 9.3.5  Digital Filter
      6. 9.3.6  Voltage Reference Input
      7. 9.3.7  Internal Voltage Reference
      8. 9.3.8  Excitation Current Sources
      9. 9.3.9  Sensor Detection
      10. 9.3.10 Bias Voltage Generation
      11. 9.3.11 General-Purpose Digital I/O
      12. 9.3.12 System Monitor
        1. 9.3.12.1 Power-Supply Monitor
        2. 9.3.12.2 External Voltage Reference Monitor
        3. 9.3.12.3 Ambient Temperature Monitor
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power Up
      2. 9.4.2 Reset
      3. 9.4.3 Power-Down Mode
      4. 9.4.4 Conversion Control
        1. 9.4.4.1 Settling Time for Channel Multiplexing
        2. 9.4.4.2 Channel Cycling and Overload Recovery
        3. 9.4.4.3 Single-Cycle Settling
        4. 9.4.4.4 Digital Filter Reset Operation
      5. 9.4.5 Calibration
        1. 9.4.5.1 Offset Calibration Register: OFC[2:0]
        2. 9.4.5.2 Full-Scale Calibration Register: FSC[2:0]
        3. 9.4.5.3 Calibration Commands
          1. 9.4.5.3.1 System Offset and Self Offset Calibration
          2. 9.4.5.3.2 System Gain Calibration
        4. 9.4.5.4 Calibration Timing
    5. 9.5 Programming
      1. 9.5.1 Serial Interface
        1. 9.5.1.1 Chip Select (CS)
        2. 9.5.1.2 Serial Clock (SCLK)
        3. 9.5.1.3 Data Input (DIN)
        4. 9.5.1.4 Data Ready (DRDY)
        5. 9.5.1.5 Data Output and Data Ready (DOUT/DRDY)
        6. 9.5.1.6 SPI Reset
        7. 9.5.1.7 SPI Communication During Power-Down Mode
      2. 9.5.2 Data Format
      3. 9.5.3 Commands
        1. 9.5.3.1  WAKEUP (0000 000x)
        2. 9.5.3.2  SLEEP (0000 001x)
        3. 9.5.3.3  SYNC (0000 010x)
        4. 9.5.3.4  RESET (0000 011X)
        5. 9.5.3.5  RDATA (0001 001x)
        6. 9.5.3.6  RDATAC (0001 010x)
        7. 9.5.3.7  SDATAC (0001 011x)
        8. 9.5.3.8  RREG (0010 rrrr, 0000 nnnn)
        9. 9.5.3.9  WREG (0100 rrrr, 0000 nnnn)
        10. 9.5.3.10 SYSOCAL (0110 0000)
        11. 9.5.3.11 SYSGCAL (0110 0001)
        12. 9.5.3.12 SELFOCAL (0110 0010)
        13. 9.5.3.13 NOP (1111 1111)
        14. 9.5.3.14 Restricted Command (1111 0001)
    6. 9.6 Register Maps
      1. 9.6.1 ADS1246 Register Map
      2. 9.6.2 ADS1246 Detailed Register Definitions
        1. 9.6.2.1 BCS—Burn-out Current Source Register (offset = 00h) [reset = 01h]
        2. 9.6.2.2 VBIAS—Bias Voltage Register (offset = 01h) [reset = 00h]
        3. 9.6.2.3 MUX—Multiplexer Control Register (offset = 02h) [reset = x0h]
        4. 9.6.2.4 SYS0—System Control Register 0 (offset = 03h) [reset = 00h]
        5. 9.6.2.5 OFC—Offset Calibration Coefficient Registers (offset = 04h, 05h, 06h) [reset = 00h, 00h, 00h]
        6. 9.6.2.6 FSC—Full-Scale Calibration Coefficient Registers (offset = 07h, 08h, 09h) [reset = PGA dependent]
        7. 9.6.2.7 ID—ID Register (offset = 0Ah) [reset = x0h]
      3. 9.6.3 ADS1247 and ADS1248 Register Map
      4. 9.6.4 ADS1247 and ADS1248 Detailed Register Definitions
        1. 9.6.4.1  MUX0—Multiplexer Control Register 0 (offset = 00h) [reset = 01h]
        2. 9.6.4.2  VBIAS—Bias Voltage Register (offset = 01h) [reset = 00h]
        3. 9.6.4.3  MUX1—Multiplexer Control Register 1 (offset = 02h) [reset = x0h]
        4. 9.6.4.4  SYS0—System Control Register 0 (offset = 03h) [reset = 00h]
        5. 9.6.4.5  OFC—Offset Calibration Coefficient Register (offset = 04h, 05h, 06h) [reset = 00h, 00h, 00h]
        6. 9.6.4.6  FSC—Full-Scale Calibration Coefficient Register (offset = 07h, 08h, 09h) [reset = PGA dependent]
        7. 9.6.4.7  IDAC0—IDAC Control Register 0 (offset = 0Ah) [reset = x0h]
        8. 9.6.4.8  IDAC1—IDAC Control Register 1 (offset = 0Bh) [reset = FFh]
        9. 9.6.4.9  GPIOCFG—GPIO Configuration Register (offset = 0Ch) [reset = 00h]
        10. 9.6.4.10 GPIODIR—GPIO Direction Register (offset = 0Dh) [reset = 00h]
        11. 9.6.4.11 GPIODAT—GPIO Data Register (offset = 0Eh) [reset = 00h]
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Serial Interface Connections
      2. 10.1.2 Analog Input Filtering
      3. 10.1.3 External Reference and Ratiometric Measurements
      4. 10.1.4 Establishing a Proper Common-Mode Input Voltage
      5. 10.1.5 Isolated (or Floating) Sensor Inputs
      6. 10.1.6 Unused Inputs and Outputs
      7. 10.1.7 Pseudo Code Example
      8. 10.1.8 Channel Multiplexing Example
      9. 10.1.9 Power-Down Mode Example
    2. 10.2 Typical Applications
      1. 10.2.1 Ratiometric 3-Wire RTD Measurement System
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Topology
          2. 10.2.1.2.2 RTD Selection
          3. 10.2.1.2.3 Excitation Current
          4. 10.2.1.2.4 Reference Resistor RREF
          5. 10.2.1.2.5 PGA Setting
          6. 10.2.1.2.6 Common-Mode Input Range
          7. 10.2.1.2.7 Input and Reference Low-Pass Filters
          8. 10.2.1.2.8 Register Settings
        3. 10.2.1.3 Application Curves
      2. 10.2.2 K-Type Thermocouple Measurement (-200°C to +1250°C) with Cold-Junction Compensation
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Biasing Resistors
          2. 10.2.2.2.2 Input Filtering
          3. 10.2.2.2.3 PGA Setting
          4. 10.2.2.2.4 Cold-Junction Measurement
          5. 10.2.2.2.5 Calculated Resolution
          6. 10.2.2.2.6 Register Settings
    3. 10.3 Do's and Don'ts
  11. 11Power-Supply Recommendations
    1. 11.1 Power-Supply Sequencing
    2. 11.2 Power-Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

1 Features

  • Programmable Data Rates Up to 2 kSPS
  • Single-Cycle Settling for All Data Rates
  • Simultaneous 50-Hz and 60-Hz Rejection at 20 SPS
  • Analog Multiplexer With 8 (ADS1248) and 4 (ADS1247) Independently Selectable Inputs
  • Low-Noise PGA: 48 nVRMS at PGA = 128
  • Dual-Matched Programmable Excitation Current Sources
  • Low-Drift Internal 2.048-V Reference:
    10 ppm/°C (Maximum)
  • Sensor Burn-Out Detection
  • 4 or 8 General-Purpose I/Os (ADS1247, ADS1248)
  • Internal Temperature Sensor
  • Power Supply and VREF Monitoring (ADS1247, ADS1248)
  • Self and System Calibration
  • SPI™-Compatible Serial Interface
  • Analog Supply: Unipolar (2.7 V to 5.25 V) and Bipolar (±2.5 V) Operation
  • Digital Supply: 2.7 V to 5.25 V

2 Applications

  • Temperature Sensor Measurements:
    • RTDs, Thermocouples, and Thermistors
  • Pressure Measurements
  • Flow Meters
  • Factory Automation and Process Controls

3 Description

The ADS1246, ADS1247, and ADS1248 devices are precision, 24-bit analog-to-digital converters (ADCs) that include many integrated features to reduce system cost and component count for sensor measurement applications. The devices feature a low-noise, programmable gain amplifier (PGA), a precision delta-sigma (ΔΣ) ADC with a single-cycle settling digital filter, and an internal oscillator. The ADS1247 and ADS1248 devices also provide a built-in, low-drift voltage reference, and two matched programmable excitation current sources (IDACs).

An input multiplexer supports four differential inputs for the ADS1248, two for the ADS1247, and one for the ADS1246. In addition, the multiplexer integrates sensor burn-out detection, voltage bias for thermocouples, system monitoring, and general purpose digital I/Os (ADS1247 and ADS1248). The PGA provides selectable gains up to 128 V/V. These features provide a complete front-end solution for temperature sensor measurement applications including thermocouples, thermistors, and resistance temperature detectors (RTDs) and other small signal measurements including resistive bridge sensors. The digital filter settles in a single cycle to support fast channel cycling when using the input multiplexer and provides data rates up to 2 kSPS. For data rates of 20 SPS or less, both 50-Hz and 60-Hz interference are rejected by the filter.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
ADS1246 TSSOP (16) 5.00 mm × 4.40 mm
ADS1247 TSSOP (20) 6.50 mm × 4.40 mm
ADS1248 TSSOP (28) 9.70 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Schematic

ADS1246 ADS1247 ADS1248 ai_46_47_48_fbd_new_sbas426.gif