High speed RF sampling converters often include integrated PLL/VCO to supply the high frequency sampling clock. The integrated clock, such as the one included in the AFE7920, is sensitive to power supply spurs and noise. Any degradation on the clock from the power supply directly impacts the data converter performance. The most common solution to minimize that noise is to use linear power supplies, or a DC-DC converter from the main bus rail followed by a low droput regulator. Compared to a linear supply, there are two big advantages of being able to use a DC-DC converter alone: the reduction in power loss and the size of the power supply. To use a DC-DC converter alone requires careful consideration of the switching supply selected, as well as the design and layout of the DC-DC converter. However, with the TPS62913, it is possible to achieve the desired results of the same performance as a traditional design using LDOs but with lower power dissipation and smaller board space.

This application note uses the AFE7920 as an example of a high performance RF sampling transceiver where the 1.8 V supplies have been changed from a DC-DC converter+LDO approach to a DC-DC converter-only approach. This methodology can be used for many other noise sensitive applications as well. The TPS62913 low-ripple and low-noise buck converter used in this application note is specifically designed to help engineers design power supplies that meet the noise and ripple requirements for noise sensitive applications.