SPRACA2A July 2017 – March 2022 TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1
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With devices growing in available memory, peripherals, and pin options, the need to enhance and allow further boot configurations is critical to developers. The boot mode options provided on the device drives the development strategy used to guarantee the device has the flexibility needed for all stages of development. Although code could be placed in flash to run custom kernels, this uses valuable flash memory space and adds additional delay before running the main application. C2000 devices over the years have strived toward a more configurable, less demanding boot flow by reducing the number of boot mode selection pins from 4 to 2 as well as adding some additional peripheral bootloader general-purpose input/output (GPIO) pin mux options. This application report is here to not only detail how these customizable options have changed on various C2000 devices, but also explain how the new boot options on F28004x device onwards lead to a much more customizable, flexible device. The following sections will cover several aspects of boot customizations now possible. One being the customization of how many boot mode select pins are allocated on the device, which allows for such scenarios where 0 boot mode select pins are used, if desired. Additionally, the boot mode select pin GPIOs are configurable and it is possible to create a fully user defined default boot mode selection table using a greater defined set of available boot modes.
For more details regarding boot up flow and the referenced configurable boot memory locations, see the device-specific reference guides and technical reference manuals (TRM):
The complexity and flexibility of C2000 boot configurations have scaled as devices evolved. The latest enhanced features and options for specific boot configurations starting on F28004x devices now bring C2000 to a whole new level of customization and flexibility. The following sections highlight and describe these new options. Additionally, a comparison is provided to show how such customizations were handled on past C2000 devices.
All the latest C2000 devices use a defined set of GPIOs to allow for boot mode selection upon device power-on or reset. This is accomplished by the boot code decoding the state, whether pulled high or low, of the GPIOs. Once decoded, the interpreted value is used as an index to select which boot mode from the boot mode selection table should be run. The GPIOs used as boot mode select pins have typically been locked to their default GPIO. Starting with the Delfino F2837xD devices and carried over to future devices, the GPIOs used as boot mode select pins are now configurable. On F28004x onwards, writing to the BOOTPIN_CONFIG memory location in user-configurable dual code security module (DCSM) OTP allows for all three of the possible boot mode select pins to be set to almost any GPIO available on the device. Devices are no longer locked to the factory default GPIOs, which allows for a greater flexibility in terms of pin usage.
C2000 devices have not only required a certain set of GPIOs to use as boot mode select pins, but a specified number of pins themselves. The number of boot mode select pins used either expands or restricts the available boot modes selectable in the boot table. If there are four boot mode select pins used, there can be up to 16 boot options selectable, but if only two boot mode select pins are used then only four boot options are selectable. On F28004x device onwards, the factory default setting is two boot mode select pins but the number of pins can be customized to support as many as three pins and as few as 0 pins. Using options such as 0 boot mode select pins, provides only a single boot mode to be selected but also frees up the other pins to be repurposed. If many boot modes are required for various scenarios, then using three pins will allow for selecting between eight possible boot choices. Disabling any particular boot mode selection pin uses the same BOOTPIN_CONFIG memory location as when changing the GPIO number used except now a value of “0xFF” is written to disable that specified pin.
Device | Boot Pin GPIO Custom Selection | Number of Boot Pins | Factory Default Boot Pins |
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F2833x | Number of boot mode select pins (BMSP) and GPIOs assigned are fixed | 4 |
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F2802x | 2 |
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F2806x | 2 |
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F2837xD/F2837xS/F2807x | Number of BMSPs fixed at 2 and GPIOs assigned are customizable. It is also possible to assign same GPIO to both BMSP thus allowing a single pin use case | 2 |
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F28004x | Number of BMSPs and GPIOs assigned are customizable | 0,1,2 or 3 |
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F2838xD/F2838xS |
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F28002x |
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F28003x |
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