SPRAD72 February 2023 F29H850TU , F29H859TU-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1
The Ethernet physical layer (PHY) is a transceiver component for transmitting and receiving data of Ethernet frames and the PHY device implements the physical layer in the open systems interconnection (OSI) model. The PHY device acts as a bridge between the medium access controller (MAC - data link layer in OSI model) and a physical medium such as copper or fiber cable.
The serial management interface (SMI) provides access to the PHY device internal register space for status information and configuration. Proper PHY configuration using SMI is fundamental during the prototype stage, and also crucial to meeting the requirements of the lowest deterministic latency and fastest link detection in industrial Ethernet applications such as EtherCAT®. The SMI is compatible with IEEE 802.3 clause 22 and clause 45. The implemented register set consists of the registers required by the IEEE 802.3 plus several others to provide additional visibility and controllability of the PHY device.
This application note provides guidance on the Ethernet PHY configuration using SMI of the EtherCAT slave controller (ESC) in the C2000™ device for industrial applications.
C2000™ and Code Composer Studio™ are trademarks of Texas Instruments.
EtherCAT® and Beckhoff® are registered trademarks of Beckhoff Automation GmbH.
All trademarks are the property of their respective owners.
Ethernet for Control Automation Technology (EtherCAT®) is an Ethernet-based fieldbus system, invented by Beckhoff® Automation and is standardized in IEC 61158. All the slave nodes connected to the bus interpret, process, and modify the addressed data on the fly (when needed basis), without having to buffer the frame inside the node. This real-time behavior, frame processing, and forwarding requirements are implemented by the EtherCAT slave controller hardware. EtherCAT does not require software interaction for data transmission inside the slaves. EtherCAT only defines the MAC layer while the higher layer protocols and stack are implemented in software on the microcontrollers connected to the ESC. The SMI in C2000 ESC is called PHY management interface used for communication with the Ethernet PHYs. See #GUID-E7718E96-EBB4-439E-B6C0-5E8B5C66323F for the connectivity of SMI.
MDIO must have a pullup resistor (4.7 kΩ recommended) externally. MCLK is driven rail-to-rail, idle value is HIGH.
The SMI includes the management clock (MDC) and the management input/output data pin (MDIO). MDC is sourced by the ESC, and can run at a maximum clock rate of 25 MHz. MDC is not expected to be continuous, and can be turned off by the ESC when the bus is idle.
MDIO is sourced by the ESC and by the PHY. The data on the MDIO pin is latched on the rising edge of the MDC. MDIO pin requires a pullup resistor, which pulls MDIO high during IDLE and turnaround.