Kening Gao
While planning to write this post, I typed “type-C” into Google Trends. Interest in the term has been rising since 2015 shown in Figure 1.
USB Type-C devices are getting more and more popular in the real world as well, with many prevalent cell phones and tablets adopting USB Type-C. I expect products with USB Type-C to increase rapidly in the coming years.
Besides having a flippable plug that works regardless of orientation, USB Type-C delivers more power than any previous USB version. Although USB Type-C can support up to 100W for USB 3.1 and USB Power Delivery, system designers must choose features carefully to keep their overall costs reasonable. The USB Type-C interface also introduces native power capability of 15W, which is six times the standard USB 2.0 charging rate. For most smartphones and tablets, 15W is probably adequate, with a reasonable cost.
In previous power adapters for mobile phones, a normal power level is 5V/2A or below. Primary-side regulation (PSR) is usually used for the AC/DC conversion because of its simplicity and ability to eliminate the optical isolator and programmable reference. A diode rectifier is used at this power level because the load current is not high. Figure 2 shows a simple PSR schematic with diode rectification.
PSR saves costs because it eliminates the need for secondary-side feedback components and an optical coupler. However designing with PSR + SR is not as easy as using PSR only.
Most PSR controllers will detect the voltage of the auxiliary winding on the knee point when the secondary diode current goes to zero, as the voltage on auxiliary winding is the closest to VOUT/Na, where Na is the ratio of the auxiliary winding to the secondary winding.
There is a voltage bump on the auxiliary winding when the body diode conducts at the end of the secondary conduction time if using SR, refer to Figure 3. This bump will affect the PSR-detecting mechanism and cause stability problems, which may manifest as abnormal ripple.
To stabilize PSR + SR, the UCC28704’s (PSR controller) data sheet makes it easier to work stably with SR drivers. tBW, tDMAG and working frequency are the parameters to design carefully. Where tBW is the SR bump width, tDMAG is the secondary rectifier conduction time
The critical parameter dictating the maximum switching frequency when using the UCC28704 with SR is determined based on tDMAG(min). The tDMAG(min) needs to be longer than 2.45μs, including the SR bump width (tBW) which is 750ns. The 750ns (tBW) is required for the internal circuit to filter out the SR bump change caused by MOSFET body-diode conduction sensed on the VS pin waveform. The corresponding switching frequency measured at the starting point of constant-current operation should not be greater than 55kHz.
Following the guidelines, I made a 5V/3A board as shown in Figure 4. The ripple is below 150mV, and the efficiency curve is in Figure 5.
The four-point average efficiency measured at a 150mΩ cable end with 115VAC and 230VAC inputs are 83.4% and 83.2%. The COC Tier 2 2016 compliance is 81.8% for full load and 72.5% for 10% load.
The board can meet the CoC Tier2 compliance with enough margins even with 150mΩ cable.
Following the guidelines in the UCC28704 data sheet, you can overcome the limitations and make a PSR + SR design that is low cost, yet has high-enough efficiency for USB Type-C adapters.
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