DLPU018J October   2014  – June 2024 DLPC900

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Related Documents from Texas Instruments
    3.     If You Need Assistance
    4.     Trademarks
  3. 1Interface Protocol
    1. 1.1 I2C Interface
      1. 1.1.1 I2C Transaction Structure
        1. 1.1.1.1 I2C START Condition
        2. 1.1.1.2 I2C STOP Condition
        3. 1.1.1.3 DLPC900 I2C Secondary Controller Address 
        4. 1.1.1.4 DLPC900 I2C Sub-Address and Data Bytes
      2. 1.1.2 Example I2C Read Command Sequence
        1. 1.1.2.1 I2C Read Command Example with Parameters
      3. 1.1.3 Example I2C Write Command Sequence
    2. 1.2 USB Interface
      1. 1.2.1 USB Transaction Sequence
      2. 1.2.2 USB Read Transaction Sequence Example
      3. 1.2.3 USB Write Transaction Sequence Example
    3. 1.3 INIT_DONE Signal
  4. 2DLPC900 Control Commands
    1. 2.1 DLPC900 Status Commands
      1. 2.1.1 Hardware Status
      2. 2.1.2 System Status
      3. 2.1.3 Main Status
      4. 2.1.4 Retrieve Firmware Version
      5. 2.1.5 Reading Hardware Configuration and Firmware Tag Information
      6. 2.1.6 Read Error Code
      7. 2.1.7 Read Error Description
    2. 2.2 DLPC900 Firmware Programming Commands
      1. 2.2.1  Read Status
      2. 2.2.2  Enter Program Mode
      3. 2.2.3  Exit Program Mode
      4. 2.2.4  Read Control
      5. 2.2.5  Start Address
      6. 2.2.6  Erase Sector
      7. 2.2.7  Download Flash Data Size
      8. 2.2.8  Download Data
      9. 2.2.9  Calculate Checksum
      10. 2.2.10 Controller Enable/Disable Command
    3. 2.3 Chipset Control Commands
      1. 2.3.1  Chipset Configuration Commands
        1. 2.3.1.1 Power Mode
        2. 2.3.1.2 DMD Standby and Idle Modes
        3. 2.3.1.3 DMD Park/Unpark (No Longer Recommended)
        4. 2.3.1.4 Curtain Color
      2. 2.3.2  Parallel Interface Configuration
        1. 2.3.2.1 Parallel Port Configuration
        2. 2.3.2.2 Input Data Channel Swap
      3. 2.3.3  Input Source Commands
        1. 2.3.3.1 Port and Clock Configuration
        2. 2.3.3.2 Input Source Configuration
        3. 2.3.3.3 Input Pixel Data Format
        4. 2.3.3.4 Internal Test Pattern Select
        5. 2.3.3.5 Internal Test Patterns Color
        6. 2.3.3.6 Load Image
      4. 2.3.4  Image Flip
        1. 2.3.4.1 Long-Axis Image Flip
        2. 2.3.4.2 Short Axis Image Flip
      5. 2.3.5  IT6535 Power Mode
      6. 2.3.6  Gamma Configuration and Enable
      7. 2.3.7  LED Driver Commands
        1. 2.3.7.1 LED Enable Outputs
          1. 2.3.7.1.1 LED PWM Polarity
        2. 2.3.7.2 LED Driver Current
        3. 2.3.7.3 Minimum LED Pulse Width in microseconds (µs)
        4. 2.3.7.4 Minimum LED Pulse Width in nanoseconds (ns)
        5. 2.3.7.5 Get Minimum LED Pattern Exposure in microseconds (µs)
        6. 2.3.7.6 Get Minimum LED Pattern Exposure in nanoseconds (ns)
      8. 2.3.8  GPIO Commands
        1. 2.3.8.1 GPIO Configuration
        2. 2.3.8.2 GPIO Clock Configuration
        3. 2.3.8.3 GPIO Busy
      9. 2.3.9  Pulse Width Modulated (PWM) Control
        1. 2.3.9.1 PWM Setup
        2. 2.3.9.2 PWM Enable
      10. 2.3.10 Batch File Commands
        1. 2.3.10.1 Batch File Name
        2. 2.3.10.2 Batch File Execute
        3. 2.3.10.3 Batch File Delay
        4. 2.3.10.4 Batch File Example
    4. 2.4 Display Mode Commands
      1. 2.4.1 Display Mode Selection
        1. 2.4.1.1 Video Mode Resolution
        2. 2.4.1.2 Input Display Resolution
        3. 2.4.1.3 DMD Block Load
        4. 2.4.1.4 Minimum Exposure Times
      2. 2.4.2 Image Header
      3. 2.4.3 Pattern Image Compression
        1. 2.4.3.1 Run-Length Encoding
          1. 2.4.3.1.1 RLE Compression Example
        2. 2.4.3.2 Enhanced Run-Length Encoding
          1. 2.4.3.2.1 Enhanced RLE Compression Example
          2. 2.4.3.2.2 End of Image Padding
      4. 2.4.4 Pattern Display Commands
        1. 2.4.4.1 Trigger Commands
          1. 2.4.4.1.1 Trigger Out 1
          2. 2.4.4.1.2 Trigger Out 2
          3. 2.4.4.1.3 Trigger In 1
          4. 2.4.4.1.4 Trigger In 2
        2. 2.4.4.2 LED Enable Delay Commands
          1. 2.4.4.2.1 Red LED Enable Delay
          2. 2.4.4.2.2 Green LED Enable Delay
          3. 2.4.4.2.3 Blue LED Enable Delay
        3. 2.4.4.3 Pattern Display Commands
          1. 2.4.4.3.1 Pattern Display Start/Stop
          2. 2.4.4.3.2 Pattern Display Invert Data
          3. 2.4.4.3.3 Pattern Display LUT Configuration
          4. 2.4.4.3.4 Pattern Display LUT Reorder Configuration
          5. 2.4.4.3.5 Pattern Display LUT Definition
        4. 2.4.4.4 Pattern On-The-Fly Commands
          1. 2.4.4.4.1 Initialize Pattern BMP Load
          2. 2.4.4.4.2 Pattern BMP Load
        5. 2.4.4.5 I2C Pass Through Commands
          1. 2.4.4.5.1 I2C Pass Through Configuration
          2. 2.4.4.5.2 I2C Pass Through Write
          3. 2.4.4.5.3 I2C Pass Through Read
    5. 2.5 Debug Mode Commands
      1. 2.5.1 Destination Controller Command (Dual Controller System)
      2. 2.5.2 Memory Read/Write Command
        1. 2.5.2.1 Valid Memory Address Ranges
      3. 2.5.3 Debug Mask Command
  5. 3DLPC900 Fault Status
    1. 3.1 DLPC900 FAULT_STATUS Locations
    2. 3.2 DLPC900 FAULT_STATUS Interpretation
  6. 4Power-Up and Power-Down and Initialization Considerations
    1. 4.1 Power-Up
    2. 4.2 Power-Down
    3. 4.3 Power-Up Auto-Initialization
  7. 5Command Examples
    1. 5.1 Video Pattern Mode Example
    2. 5.2 Pre-Stored Pattern Mode Example
    3. 5.3 Pattern On-The-Fly Example
    4. 5.4 I2C Pass Through Write Example
    5. 5.5 I2C Pass Through Read Example
  8.   A Register Quick Reference
    1.     A.1 I2C Register Quick Reference
    2.     A.2 Command Guide
  9.   B Batch File Command Descriptors
    1.     B.1 Command Descriptors
  10.   C Revision History

2.4.1.3 DMD Block Load

The DMD Block Load command allows the user to specify which of the DMD blocks are active. Only adjacent blocks are allowed. Mirrors in blocks that are not active are set to their off state prior to the pattern sequence running. Selecting a reduced number of active DMD blocks allows for an increase in pattern speeds. See Table 2-109.

Block Load is only applicable for 1-bit depth patterns. The entire 1-bit pattern data must be sent to the controller when using video pattern mode, pattern on the fly, or prestored pattern mode. The controller loads the selected blocks based on the rows selected in Block Load.

Note:

The performance of mirrors in blocks that are not active are affected by prolonged use of being in the off state. To optimize the mirrors, enable DMD Idle Mode as often as possible. This mode provides a 50/50 duty cycle across the entire DMD mirror array, where the mirrors are continuously flipped between the on and off states. See command in Section 2.3.1.2.

Table 2-107 DMD Block Load Command
I2C USB
Read Write 0x1A40
0x60 0xE0
Table 2-108 DMD Block Load Command Definition
BYTE BITS DESCRIPTION (1) RESET TYPE
0 4:0 Start block. Range 0x0 - 0xE on DMDs with 15 blocks or 0x0 - 0xF on DMDs with 16 blocks 0x0 wr
7:5 Reserved 0x0 r
1 4:0 Number of blocks. Range 0x1 - 0xE on DMDs with 15 blocks or 0x1 - 0xF on DMDs with 16 blocks 0xF or 0x10 wr
7:5 Reserved 0x0 r
(1) When short and long axes are disabled, block 0 begins at pixel (0,0) on the DMD.
Table 2-109 DMD Block Load Minimum Exposure Times
NUMBER OF DMD ACTIVE BLOCKS(1) Block Load Minimum Exposure Time (µs)
DLP5500 DLP6500 DLP9000 DLP670S DLP500YX
1 25 24 24 27 30
2 30 45 42 27 30
3 35 45 42 27 30
4 28 45 42 33 30
5 33 48 45 38 34
6 38 54 51 44 38
7 43 60 56 49 42
8 48 66 61 55 46
9 53 72 67 61 50
10 58 78 72 66 54
11 63 84 77 72 58
12 68 90 83 77 62
13 73 96 88 83 -
14 78 101 93 89
15 83 105 99 94
16 94 - 105 100
(1) See DMD data sheet for number of blocks and rows per block.