DLPU018J October 2014 – June 2024 DLPC900
This command indicates if the flash is ready to be programmed and also if a flash operation is in progress.
I2C | USB |
---|---|
Read | 0x0000 |
0x23 |
BYTE | BITS | DESCRIPTION | RESET | TYPE |
---|---|---|---|---|
0 | 0 | Primary ready | d1 | r |
0 = Primary not ready | ||||
1 = Primary ready | ||||
1 | Secondary ready (Valid only on Dual DLPC900 board) | d0
(single controller DMD) d1 (dual controller DMD) |
||
0 = Secondary not ready | ||||
1 = Secondary ready | ||||
2 | Secondary controller flash busy (Valid only on Dual DLPC900 board) | d0 | ||
0 = Secondary not busy | ||||
1 = Secondary busy | ||||
3 | Primary controller flash busy | d0 | ||
0 = Primary not busy | ||||
1 = Primary busy | ||||
4 | Reserved | d0 | ||
5 | Secondary controller present (Valid only on Dual DLPC900 board) | d0
(single controller DMD) d1 (dual controller DMD) |
||
0 = Secondary not present | ||||
1 = Secondary present | ||||
6 | Secondary controller program mode (Valid only on Dual DLPC900 board) | d0
(single controller DMD) d1 (dual controller DMD) |
||
0 = Secondary not in program mode | ||||
1 = Secondary in program mode | ||||
7 | Primary controller program mode | d1 | ||
0 = Primary not in program mode | ||||
1 = Primary in program mode | ||||
1 | 3:0 | Major Version | x | |
7:4 | Minor version | x | ||
2 | 7:0 | Patch version | x | |
3 | 7:0 | Controller ID | 0x52 | |
4 | 7:0 | Bootloader ID 0x65 = Single DLPC900 0x90 = Dual DLPC900 |
0x65 (Single
DLPC900) 0x90 (Dual DLPC900) |
|
5 | 7:0 | Bytes 1 - 15 are from Primary or Secondary | d1 | |
0 = Bytes 1 - 15 are from Secondary | ||||
1 = Bytes 1 - 15 are from Primary | ||||
6 | 7:0 | Data (LSB) | d0 | |
7 | 7:0 | Data | d0 | |
8 | 7:0 | Data | d0 | |
9 | 7:0 | Data (MSB) | d0 | |
10 | 7:0 | Reserved | 0x3 | |
11 | 7:0 | Reserved | d0 | |
12 | 7:0 | Data (LSB) | d0 | |
13 | 7:0 | Data | d0 | |
14 | 7:0 | Data | d0 | |
15 | 7:0 | Data (MSB) | d0 |