DLPU035A August 2015 – December 2023 DLP4710 , DLPC3439
Table 3-52 describes the write parameters.
MSB | Byte 1 | LSB | |||||
---|---|---|---|---|---|---|---|
b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
b(7:2) | Reserved |
b(1) | Polarity Select for Data Mask Control:
|
b(0) | Data Mask Enable:
|
When the parallel data mask is enabled, the DLPC343x input PDM_CVS_TE pin functions as a data mask control for the video data on the parallel port interface. Therefore, when this functionality is enabled and the mask control is active, input image frames will be ignored and the source image will not be propagated to the display. During image frames that are masked, the last unmasked image frame received will continue to be displayed. The mask control signal (PDM_CVS_TE) should only be updated during vertical blanking.
The Polarity Select specifies the active state for the mask control signal. The polarity should only be updated when the mask function is disabled (via this command).