DLPU048E August   2016  – July 2024

 

  1.   1
  2.   Trademarks
  3. 1 Introduction
    1. 1.1 Document Overview
    2. 1.2 Software Overview
    3. 1.3 Headlight Overview
  4. 2 Electrical Interface
    1. 2.1 Power-Up Signals
      1. 2.1.1 STAY-IN-BOOT (TSTPT_0)
      2. 2.1.2 HOST_IF_SEL
      3. 2.1.3 CRCZ_CHKSUM_SEL
      4. 2.1.4 HOST_SPI_MODE
        1. 2.1.4.1 Boot Flow Debug
      5. 2.1.5 SPREAD-SPECTRUM-DISABLE (TSTPT_5)
    2. 2.2 System Signals
      1. 2.2.1 HOST_IRQ
      2. 2.2.2 GPIO
      3. 2.2.3 PWM Control
  5. 3 Communication Protocol
    1. 3.1 Command Protocol
    2. 3.2 SPI Specifications
    3. 3.3 I2C Specifications
    4. 3.4 Write
      1. 3.4.1 Short Write
        1. 3.4.1.1 SPI Short Write
        2. 3.4.1.2 I2C Short Write
      2. 3.4.2 Bulk Write
        1. 3.4.2.1 SPI Bulk Write
        2. 3.4.2.2 I2C Bulk Write
      3. 3.4.3 Write Command Handling
    5. 3.5 Read
      1. 3.5.1 Read Pre-Fetch
        1. 3.5.1.1 SPI Read Pre-Fetch
        2. 3.5.1.2 I2C Read Pre-Fetch
      2. 3.5.2 Read Activate
        1. 3.5.2.1 SPI Read Activate
        2. 3.5.2.2 I2C Read Activate
      3. 3.5.3 Short Status Read
        1. 3.5.3.1 SPI Short Status Read
        2. 3.5.3.2 I2C Short Status Read
      4. 3.5.4 Read Command Handling
    6. 3.6 CRC and Checksum
      1. 3.6.1 CRC Calculation
        1. 3.6.1.1 CRC Example Implementation
        2. 3.6.1.2 CRC Example
      2. 3.6.2 Checksum Calculation
    7. 3.7 Command Tags
  6. 4 System Operation
    1. 4.1 Operating Modes
      1. 4.1.1 Standby
      2. 4.1.2 Display
    2. 4.2 Software Startup Procedure
  7. 5 Application and Use-Cases
    1. 5.1 Display and Source
      1. 5.1.1 Displaying an Image
      2. 5.1.2 Supported Image Processing
      3. 5.1.3 External Video
      4. 5.1.4 Test Pattern
      5. 5.1.5 Splash Image
      6. 5.1.6 Image Flip
    2. 5.2 Batch Command Sets
    3. 5.3 Flash Programming
      1. 5.3.1 Flash Program - Main Application
      2. 5.3.2 Flash Read - Main Application
      3. 5.3.3 Flash Program - Boot Application
    4. 5.4 Video Frame and Illumination Bin Delay
    5. 5.5 Smooth Illumination Transition
    6. 5.6 Temperature Management
      1. 5.6.1 Temperature Management for DMD Park/Unpark
      2. 5.6.2 PWM Temperature Management Function
    7. 5.7 ADC Measurements
      1. 5.7.1 Sequence-Aligned ADC Measurements
      2. 5.7.2 Single ADC Measurements
  8. 6 Tests and Diagnostics
    1. 6.1 Overview
    2. 6.2 Emergency Shutdown
      1. 6.2.1 Emergency Shutdown Causes
    3. 6.3 Diagnostic Memory Interface
    4. 6.4 Test Descriptions
      1. 6.4.1 Periodic Tests
        1. 6.4.1.1  Video Source Loss Detection
          1. 6.4.1.1.1 Configuration
          2. 6.4.1.1.2 Execution
          3. 6.4.1.1.3 Failure Actions
          4. 6.4.1.1.4 Error Codes
        2. 6.4.1.2  Video Tell-Tale Checksum
          1. 6.4.1.2.1 Configuration
          2. 6.4.1.2.2 Execution
          3. 6.4.1.2.3 Failure Actions
          4. 6.4.1.2.4 Error Codes
        3. 6.4.1.3  Video Frame Counter Checksum
          1. 6.4.1.3.1 One-Pixel Frame Counter
          2. 6.4.1.3.2 Seven-Pixel Frame Counter
          3. 6.4.1.3.3 Configuration
          4. 6.4.1.3.4 Execution
          5. 6.4.1.3.5 Failure Actions
          6. 6.4.1.3.6 Error Codes
        4. 6.4.1.4  Average Picture Level
          1. 6.4.1.4.1 Configuration
          2. 6.4.1.4.2 Execution
          3. 6.4.1.4.3 Failure Actions
          4. 6.4.1.4.4 Error Codes
        5. 6.4.1.5  Loss of Ping Command
          1. 6.4.1.5.1 Configuration
          2. 6.4.1.5.2 Execution
          3. 6.4.1.5.3 Failure Actions
          4. 6.4.1.5.4 Error Codes
        6. 6.4.1.6  DLPC230-Q1 Processor Memory ECC
          1. 6.4.1.6.1 Configuration
          2. 6.4.1.6.2 Execution
          3. 6.4.1.6.3 Failure Actions
          4. 6.4.1.6.4 Error Codes
        7. 6.4.1.7  Flash Table Transport CRC
          1. 6.4.1.7.1 Configuration
          2. 6.4.1.7.2 Execution
          3. 6.4.1.7.3 Failure Actions
          4. 6.4.1.7.4 Error Codes
        8. 6.4.1.8  Frame Buffer Swap Watchdog
          1. 6.4.1.8.1 Configuration
          2. 6.4.1.8.2 Execution
          3. 6.4.1.8.3 Failure Actions
          4. 6.4.1.8.4 Error Codes
        9. 6.4.1.9  Sequencer Instruction Read Watchdog
          1. 6.4.1.9.1 Configuration
          2. 6.4.1.9.2 Execution
          3. 6.4.1.9.3 Failure Actions
          4. 6.4.1.9.4 Error Codes
        10. 6.4.1.10 DMD Reset Instruction Watchdog
          1. 6.4.1.10.1 Configuration
          2. 6.4.1.10.2 Execution
          3. 6.4.1.10.3 Failure Actions
          4. 6.4.1.10.4 Error Codes
        11. 6.4.1.11 DLPC230-Q1 System Voltage Monitor
          1. 6.4.1.11.1 Configuration
          2. 6.4.1.11.2 Execution
          3. 6.4.1.11.3 Failure Actions
          4. 6.4.1.11.4 Error Codes
        12. 6.4.1.12 DLPC230-Q1 DMD Voltage Monitor
          1. 6.4.1.12.1 Configuration
          2. 6.4.1.12.2 Execution
          3. 6.4.1.12.3 Failure Actions
          4. 6.4.1.12.4 Error Codes
        13. 6.4.1.13 DLPC230-Q1 TPS99000-Q1 Bandgap Monitor
          1. 6.4.1.13.1 Configuration
          2. 6.4.1.13.2 Execution
          3. 6.4.1.13.3 Failure Actions
          4. 6.4.1.13.4 Error Codes
        14. 6.4.1.14 DMD Temperature Monitor
          1. 6.4.1.14.1 Configuration
          2. 6.4.1.14.2 Execution
          3. 6.4.1.14.3 Failure Actions
          4. 6.4.1.14.4 Error Codes
        15. 6.4.1.15 DMD Clock Monitor
          1. 6.4.1.15.1 Configuration
          2. 6.4.1.15.2 Execution
          3. 6.4.1.15.3 Failure Actions
          4. 6.4.1.15.4 Error Codes
        16. 6.4.1.16 DMD High Speed Interface Training
          1. 6.4.1.16.1 Configuration
          2. 6.4.1.16.2 Execution
          3. 6.4.1.16.3 Failure Actions
          4. 6.4.1.16.4 Error Codes
        17. 6.4.1.17 DMD Low Speed Interface Test
          1. 6.4.1.17.1 Configuration
          2. 6.4.1.17.2 Execution
          3. 6.4.1.17.3 Failure Actions
          4. 6.4.1.17.4 Error Codes
        18. 6.4.1.18 TPS99000-Q1 DLPC230-Q1 Processor Watchdog (WD1)
          1. 6.4.1.18.1 Configuration
          2. 6.4.1.18.2 Execution
          3. 6.4.1.18.3 Failure Actions
          4. 6.4.1.18.4 Error Codes
        19. 6.4.1.19 TPS99000-Q1 DLPC230-Q1 Sequencer Watchdog (WD2)
          1. 6.4.1.19.1 Configuration
          2. 6.4.1.19.2 Execution
          3. 6.4.1.19.3 Failure Actions
          4. 6.4.1.19.4 Error Codes
        20. 6.4.1.20 TPS99000-Q1 Temperature Warning / Error
          1. 6.4.1.20.1 Configuration
          2. 6.4.1.20.2 Execution
          3. 6.4.1.20.3 Failure Actions
          4. 6.4.1.20.4 Error Codes
        21. 6.4.1.21 TPS99000-Q1 Clock Ratio Monitor
          1. 6.4.1.21.1 Configuration
          2. 6.4.1.21.2 Execution
          3. 6.4.1.21.3 Failure Actions
          4. 6.4.1.21.4 Error Codes
        22. 6.4.1.22 TPS99000-Q1 Register Password Lock
          1. 6.4.1.22.1 Configuration
          2. 6.4.1.22.2 Execution
          3. 6.4.1.22.3 Failure Actions
          4. 6.4.1.22.4 Error Codes
        23. 6.4.1.23 TPS99000-Q1 Register Checksum
          1. 6.4.1.23.1 Configuration
          2. 6.4.1.23.2 Execution
          3. 6.4.1.23.3 Failure Actions
          4. 6.4.1.23.4 Error Codes
        24. 6.4.1.24 Software Monitor Thread
          1. 6.4.1.24.1 Configuration
          2. 6.4.1.24.2 Execution
          3. 6.4.1.24.3 Failure Actions
          4. 6.4.1.24.4 Error Codes
      2. 6.4.2 Non-Periodic Tests
        1. 6.4.2.1  Execution Time
        2. 6.4.2.2  DLPC230-Q1 Front End Functional BIST (Main)
          1. 6.4.2.2.1 Configuration
          2. 6.4.2.2.2 Execution
          3. 6.4.2.2.3 Failure Actions
          4. 6.4.2.2.4 Error Codes
        3. 6.4.2.3  DLPC230-Q1 Back End Functional BIST (Main)
          1. 6.4.2.3.1 Configuration
          2. 6.4.2.3.2 Execution
          3. 6.4.2.3.3 Failure Actions
          4. 6.4.2.3.4 Error Codes
        4. 6.4.2.4  DLPC230-Q1 Memory BISTs (Main)
          1. 6.4.2.4.1 Configuration
          2. 6.4.2.4.2 Execution
          3. 6.4.2.4.3 Failure Actions
          4. 6.4.2.4.4 Error Codes
        5. 6.4.2.5  TPS99000-Q1 Interface Signal Connection Test (Main)
          1. 6.4.2.5.1 Configuration
          2. 6.4.2.5.2 Execution
          3. 6.4.2.5.3 Failure Actions
          4. 6.4.2.5.4 Error Codes
        6. 6.4.2.6  DMD Memory Test (Main)
          1. 6.4.2.6.1 Configuration
          2. 6.4.2.6.2 Execution
          3. 6.4.2.6.3 Failure Actions
          4. 6.4.2.6.4 Error Codes
        7. 6.4.2.7  Flash Data Verification (Boot/Main)
          1. 6.4.2.7.1 Configuration
          2. 6.4.2.7.2 Execution
          3. 6.4.2.7.3 Failure Actions
          4. 6.4.2.7.4 Error Codes
        8. 6.4.2.8  DLPC230-Q1 Boot ROM CRC (Boot)
          1. 6.4.2.8.1 Configuration
          2. 6.4.2.8.2 Execution
          3. 6.4.2.8.3 Failure Actions
          4. 6.4.2.8.4 Error Codes
        9. 6.4.2.9  DLPC230-Q1 Flash Table CRC (Boot)
          1. 6.4.2.9.1 Configuration
          2. 6.4.2.9.2 Execution
          3. 6.4.2.9.3 Failure Actions
          4. 6.4.2.9.4 Error Codes
        10. 6.4.2.10 DLPC230-Q1 Main Application CRC (Boot)
          1. 6.4.2.10.1 Configuration
          2. 6.4.2.10.2 Execution
          3. 6.4.2.10.3 Failure Actions
          4. 6.4.2.10.4 Error Codes
        11. 6.4.2.11 DLPC230-Q1 Command and Flash Interface Memory Test (Boot)
          1. 6.4.2.11.1 Configuration
          2. 6.4.2.11.2 Execution
          3. 6.4.2.11.3 Failure Actions
          4. 6.4.2.11.4 Error Codes
      3. 6.4.3 Interface Tests
        1. 6.4.3.1 Temperature Sensor Interface
          1. 6.4.3.1.1 Failure Actions
        2. 6.4.3.2 DLPC230-Q1 to TPS99000-Q1 SPI Interface
          1. 6.4.3.2.1 Failure Actions
        3. 6.4.3.3 DLPC230-Q1 to TPS99000-Q1 ADC Interface
          1. 6.4.3.3.1 Failure Actions
        4. 6.4.3.4 DMD Socket Connectivity Test
          1. 6.4.3.4.1 Configuration
          2. 6.4.3.4.2 Execution
          3. 6.4.3.4.3 Failure Actions
          4. 6.4.3.4.4 Error Codes
  9. 7 Commands - Boot Application
    1. 7.1 Command Table
    2. 7.2 Command Definitions
      1. 7.2.1  System Reset - Write (00h)
      2. 7.2.2  Read Pre-Fetch - Write (01h)
      3. 7.2.3  Read Activate (02h)
      4. 7.2.4  System Software Version - Read (B0h)
      5. 7.2.5  Flash Device ID - Read (B1h)
      6. 7.2.6  Short Status - Read (C0h)
      7. 7.2.7  Error History - Read (C1h)
      8. 7.2.8  Clear Short Status Errors - Write (C2h)
      9. 7.2.9  Clear Error History - Write (C3h)
      10. 7.2.10 Flash Full Erase - Write (E0h)
      11. 7.2.11 Flash Write Data - Write (E1h)
      12. 7.2.12 Flash Verify Data - Write (E2h)
      13. 7.2.13 Flash Interface Rate - Write (E3h)
      14. 7.2.14 Flash Interface Rate - Read (E4h)
  10. 8 Commands - Main Application
    1. 8.1 Mode Availability
    2. 8.2 Command Definitions
      1. 8.2.1  System Reset - Write (00h)
      2. 8.2.2  Read Pre-Fetch - Write (01h)
      3. 8.2.3  Read Activate (02h)
      4. 8.2.4  Operating Mode - Write (03h)
      5. 8.2.5  Operating Mode - Read (04h)
      6. 8.2.6  Source Select - Write (05h)
      7. 8.2.7  Source Select - Read (06h)
      8. 8.2.8  Prepare for Source Change - Write (07h)
      9. 8.2.9  Display Image Orientation - Write (18h)
      10. 8.2.10 Display Image Orientation - Read (19h)
      11. 8.2.11 System Mode Select - Write (1Ch)
      12. 8.2.12 System Mode Select - Read (1Dh)
      13. 8.2.13 Execute Batch Command Set - Write (21h)
      14. 8.2.14 Execution Delay - Write (22h)
      15. 8.2.15 GPIO Configure - Write (23h)
      16. 8.2.16 GPIO Configure - Read (24h)
      17. 8.2.17 GPIO Outputs - Write (25h)
      18. 8.2.18 GPIO Outputs - Read (26h)
      19. 8.2.19 GPIO Reserved - Read (27h)
      20. 8.2.20 Execute Non-Periodic BIST - Write (28h)
      21. 8.2.21 External Video Checksum Control - Write (29h)
      22. 8.2.22 External Video Checksum Control - Read (2Ah)
      23. 8.2.23 External Video Checksum Settings - Write (2Bh)
      24. 8.2.24 External Video Checksum Settings - Read (2Ch)
      25. 8.2.25 DMD Socket Connectivity Test - Write (2Dh)
      26. 8.2.26 DMD Socket Connectivity Test - Read (2Eh)
      27. 8.2.27 Average Picture Level Control - Write (2Fh)
      28. 8.2.28 Average Picture Level Control - Read (30h)
      29. 8.2.29 Loss Of Ping Control - Write (33h)
      30. 8.2.30 Loss Of Ping Control - Read (34h)
      31. 8.2.31 PWM Temperature Management Enable - Write (35h)
      32. 8.2.32 PWM Temperature Management Enable - Read (36h)
      33. 8.2.33 PWM Temperature Management Source - Write (37h)
      34. 8.2.34 PWM Temperature Management Source - Read (38h)
      35. 8.2.35 PWM Temperature Management Duty Cycle - Read (39h)
      36. 8.2.36 Headlight Ping - Write (46h)
      37. 8.2.37 PWM Control - Write (47h)
      38. 8.2.38 PWM Control - Read (48h)
      39. 8.2.39 Illumination Transition Rate - Write (49h)
      40. 8.2.40 Illumination Transition Rate - Read (4Ah)
      41. 8.2.41 De-gamma Select - Write (54h)
      42. 8.2.42 De-gamma Select - Read (55h)
      43. 8.2.43 ADC Measurements - Read (5Ch)
      44. 8.2.44 ADC Single Measurement - Read (63h)
      45. 8.2.45 Illumination Bin Select - Write (70h)
      46. 8.2.46 Illumination Bin Select - Read (71h)
      47. 8.2.47 TPS99000-Q1 TIA1 Trims - Write (86h)
      48. 8.2.48 TPS99000-Q1 TIA1 Trims - Read (87h)
      49. 8.2.49 TPS99000-Q1 TIA1 Gain - Write (88h)
      50. 8.2.50 TPS99000-Q1 TIA1 Gain - Read (89h)
      51. 8.2.51 TPS99000-Q1 TIA1 Capacitance - Write (8Ah)
      52. 8.2.52 TPS99000-Q1 TIA1 Capacitance - Read (8Bh)
      53. 8.2.53 TPS99000-Q1 TIA1 Dark Offsets - Write (8Ch)
      54. 8.2.54 TPS99000-Q1 TIA1 Dark Offsets - Read (8Dh)
      55. 8.2.55 TPS99000-Q1 TIA1 Input Offsets - Write (8Eh)
      56. 8.2.56 TPS99000-Q1 TIA1 Input Offsets - Read (8Fh)
      57. 8.2.57 TPS99000-Q1 Drive Mode - Read (93h)
      58. 8.2.58 TPS99000-Q1 ADC Configuration - Write (94h)
      59. 8.2.59 TPS99000-Q1 ADC Configuration - Read (95h)
      60. 8.2.60 TPS99000-Q1 Illumination Sync Control - Write (96h)
      61. 8.2.61 TPS99000-Q1 Illumination Sync Control - Read (97h)
      62. 8.2.62 TPS99000-Q1 TIA2 Control - Write (98h)
      63. 8.2.63 TPS99000-Q1 TIA2 Control - Read (99h)
      64. 8.2.64 LED Drive Errors - Read (9Ah)
      65. 8.2.65 LED Drive Errors Clear - Write (9Bh)
      66. 8.2.66 TPS99000-Q1 Test Mux Select - Write (9Ch)
      67. 8.2.67 TPS99000-Q1 Test Mux Select - Read (9Dh)
      68. 8.2.68 Flash Data Type Select - Write (A0h)
      69. 8.2.69 Flash Erase Data - Write (A1h)
      70. 8.2.70 Flash Write Data - Write (A2h)
      71. 8.2.71 Flash Read Data - Read (A3h)
      72. 8.2.72 Flash Verify Data - Write (A4h)
      73. 8.2.73 Flash Block Count - Read (A5h)
      74. 8.2.74 Flash Block CRCs - Read (A6h)
      75. 8.2.75 Flash Structure Version - Read (A7h)
      76. 8.2.76 Flash Data Size - Read (A9h)
      77. 8.2.77 System Software Version - Read (B0h)
      78. 8.2.78 Flash Device ID - Read (B1h)
      79. 8.2.79 DLPC230-Q1 Device ID - Read (B2h)
      80. 8.2.80 DMD Device ID - Read (B3h)
      81. 8.2.81 TPS99000-Q1 Device ID - Read (B4h)
      82. 8.2.82 System Temperatures - Read (B5h)
      83. 8.2.83 Current Source Information - Read (B6h)
      84. 8.2.84 Current Display Information - Read (B8h)
      85. 8.2.85 System Information - Read (BAh)
      86. 8.2.86 Flash Interface Rate - Read (BBh)
      87. 8.2.87 Short Status - Read (C0h)
      88. 8.2.88 Error History - Read (C1h)
        1. 8.2.88.1 Information Bits - Command or Communication
        2. 8.2.88.2 Information Bits - System Voltage
        3. 8.2.88.3 Information Bits - DMD High Speed Interface Training
        4. 8.2.88.4 Information Bits - DMD Memory Test
      89. 8.2.89 Clear Short Status Errors - Write (C2h)
      90. 8.2.90 Clear Error History - Write (C3h)
  11. 9 Commands - Diagnostic Interface
    1. 9.1 Diagnostic Command Read Procedure
    2. 9.2 Command Table
    3. 9.3 Command Definitions
      1. 9.3.1 Read Pre-Fetch - Write (01h)
      2. 9.3.2 Read Activate (02h)
      3. 9.3.3 Diagnostic Interface Status - Read (F0h)
      4. 9.3.4 Diagnostic Interface Status Clear - Write (F1h)
  12. 10Flash Configuration
    1. 10.1 Overview
    2. 10.2 System Mode Overview
    3. 10.3 Scratchpad Data
      1. 10.3.1 CRC
      2. 10.3.2 Block Number
      3. 10.3.3 Version (Major, Minor, Patch)
      4. 10.3.4 Custom Data
  13.   A Error Codes
    1.     A.1 Boot Application
    2.     A.2 Main Application
  14.   Revision History

8.2.83 Current Source Information - Read (B6h)

This command is used to read information about the currently active image source. The first byte specifies the type of source and subsequent bytes describe the settings for the source type. Each source type has different description parameters, but the length of the return bytes from this command is always 15 bytes.

Command Parameters

No command parameters.

Return Parameters (External Video)

Table 8-107 Current Source Information Return Parameters (External Video)
BYTEBITSDESCRIPTION
17:0Input Source Type

0x0: External Video

0x1: Test Pattern

0x2: Splash Screen

0x3: System in Standby or source is invalid

3:215:0External VSync Rate

LSByte = Byte 2

Specified in Hz with a resolution of 0.125 Hz. For example, 0x1E5 = 60.625 Hz.

47:0External Video Format

0x00: OpenLDI

0x40: Parallel

57:4Reserved
3External Data Enable Polarity

Polarity of the parallel video DATEN signal. This parameter is unused for OpenLDI.

0x0: Active Low

0x1: Active High

2External Clock Polarity

Polarity of the parallel video PCLK signal. This parameter is unused for OpenLDI.

0x0: Falling Edge Sample

0x1: Rising Edge Sample

1External HSync Polarity

0x0: Falling Edge Active (Negative Pulse)

0x1: Rising Edge Active (Positive Pulse)

0External VSync Polarity

0x0: Falling Edge Active (Negative Pulse)

0x1: Rising Edge Active (Positive Pulse)

7:615:0External Pixel Clock Rate

LSByte = Byte 6

Specified in MHz with a resolution of 0.125 MHz. For example, 0x1E1 = 60.125 MHz.

9:815:0Input Total Pixels Per Line

LSByte = Byte 8

11:1015:0Input Total Lines Per Frame

LSByte = Byte 10

13:1215:0Input Active Pixels Per Line

LSByte = Byte 12

15:1415:0Input Active Lines Per Frame

LSByte = Byte 14

Return Parameters (Test Pattern)

Table 8-108 Current Source Information Return Parameters (Test Pattern)
BYTEBITSDESCRIPTION
17:0Input Source Type

0x0: External Video

0x1: Test Pattern

0x2: Splash Screen

0x3: Not applicable (System in Standby)

3:215:0Internal VSync Rate

LSByte = Byte 2

Specified in Hz with a resolution of 0.125 Hz. For example, 0x1E5 = 60.625 Hz.

47:0Test Pattern Type

0x00: Solid

0x01: Horizontal Ramp (Fixed step)

0x02: Vertical Ramp (Fixed step)

0x03: Horizontal Lines

0x04: Diagonal Lines

0x05: Vertical Lines

0x06: Grid Lines (Horizontal and Vertical)

0x07: Checkerboard

0x08 Color Bars

0x09 - 0x0F: Reserved

57:4Foreground Color

Foreground color is not used when certain test pattern types are displayed. Refer to Table 8-109. This value should be ignored if the test pattern type does not use this value.

0x0: Black

0x1: Red

0x2: Green

0x3: Blue

0x4: Cyan

0x5: Magenta

0x6: Yellow

0x7: White

0x8 - 0xF: Reserved

3:0Background Color

Background color is not used when certain test pattern types are displayed. Refer to Table 8-109. This value should be ignored if the test pattern type does not use this value.

0x0: Black

0x1: Red

0x2: Green

0x3: Blue

0x4: Cyan

0x5: Magenta

0x6: Yellow

0x7: White

0x8 - 0xF: Reserved

9:639:0Test Pattern Parameters

Reserved

15:1047:0Pad Bytes

Extra bytes to keep the command's return length 15 bytes for any source type

Value = 0x0

Table 8-109 Test Pattern Foreground / Background Color Usage
PATTERNFOREGROUND COLOR USEDBACKGROUND COLOR USED
SolidYesNo
Horizontal RampYesNo
Vertical RampYesNo
Horizontal LinesYesYes
Vertical LinesYesYes
Diagonal LinesYesYes
Grid LinesYesYes
CheckerboardYesYes
Color BarsNoNo

Return Parameters (Splash)

Table 8-110 Current Source Information Return Parameters (Splash)
BYTEBITSDESCRIPTION
17:0Input Source Type

0x0: External Video

0x1: Test Pattern

0x2: Splash Screen

0x3: Not applicable (System in Standby)

3:215:0Internal VSync Rate

LSByte = Byte 2

Specified in Hz with a resolution of 0.125 Hz. For example, 0x1E5 = 60.625 Hz.

47:0Splash Screen Index

Reference number of the splash screen stored in flash (0-7).

15:587:0Pad Bytes

Extra bytes to keep the command's return length 15 bytes for any source type

Value = 0x0