DLPU057A March   2018  – April 2022

 

  1. 1Serial Peripheral Interface (SPI)
    1. 1.1 Serial Peripheral Interface (SPI)
    2. 1.2 Block Diagram
    3. 1.3 Signal Format
    4. 1.4 SPI Packet Structure
      1. 1.4.1 START CHARACTER
      2. 1.4.2 Command Byte
      3. 1.4.3 Length Byte
      4. 1.4.4 Data Bytes
      5. 1.4.5 Checksum
      6. 1.4.6 Response Byte
    5. 1.5 Error Checking Mechanisms
      1. 1.5.1 SPI Transaction Start and Escape Character
      2. 1.5.2 Checksum Computation With Special Characters
      3. 1.5.3 SPI Flow Control Diagrams
  2. 2SPI Command Specification – Bootloader
    1. 2.1 SPI Command Specification – Bootloader
    2. 2.2 Bootloader Software Version (32h)
      1. 2.2.1 Read Response
    3. 2.3 Bootloader Software Status (33h)
      1. 2.3.1 Read Response
    4. 2.4 Binary Flash Read/Set Binary Read Start Address (71h)
      1. 2.4.1 Write
      2. 2.4.2 Read
      3. 2.4.3 Read Response
    5. 2.5 Toggle Mode (7Ah)
      1. 2.5.1 Read
      2. 2.5.2 Read Response
    6. 2.6 Program Piccolo Software (7Bh)
      1. 2.6.1 Erase
      2. 2.6.2 Start Address and Length
      3. 2.6.3 Program
      4. 2.6.4 Read
      5. 2.6.5 Read Response
    7. 2.7 Piccolo Program Mode (7Eh)
      1. 2.7.1 Read Response
    8. 2.8 Stay in Bootloader
      1. 2.8.1 Write Bytes
      2. 2.8.2 Read Response
  3. 3SPI Command Specification – Main Application
    1. 3.1  SPI Command Specification – Main Application
    2. 3.2  Backlight (00h)
      1. 3.2.1 Write
      2. 3.2.2 Read
      3. 3.2.3 Read Response
    3. 3.3  Master ON/OFF (01h)
      1. 3.3.1 Write
      2. 3.3.2 Read
      3. 3.3.3 Read Response
    4. 3.4  DMD Park (02h)
      1. 3.4.1 Write
      2. 3.4.2 Read
      3. 3.4.3 Read Response
    5. 3.5  Splash Control Mode (25h)
      1. 3.5.1 Write
      2. 3.5.2 Read
      3. 3.5.3 Read Response
    6. 3.6  DMD Drive Strength (26h)
      1. 3.6.1 Write
      2. 3.6.2 Read
      3. 3.6.3 Read Response
    7. 3.7  Heater PWM Parameters (27h)
      1. 3.7.1 Write
      2. 3.7.2 Read
      3. 3.7.3 Read Response
    8. 3.8  Bezel Offset (28h)
      1. 3.8.1 Write
      2. 3.8.2 Read
      3. 3.8.3 Read Response
    9. 3.9  Prepare ASIC Flash/Switch SPI Bus (2Fh)
      1. 3.9.1 Write
      2. 3.9.2 Read
      3. 3.9.3 Read Response
    10. 3.10 ASIC BIST Results (30h)
      1. 3.10.1 Read Response
    11. 3.11 ASIC Initialization Type (31h)
      1. 3.11.1 Read Response
    12. 3.12 Piccolo Software Version (32h)
      1. 3.12.1 Read Response
    13. 3.13 Piccolo Software Status (33h)
      1. 3.13.1 Read Response
    14. 3.14 ASIC Register (34h)
      1. 3.14.1 Write
      2. 3.14.2 Read
      3. 3.14.3 Read Response
      4. 3.14.4 ASIC Register Details
    15. 3.15 VAC Mode (35h)
      1. 3.15.1 Write
      2. 3.15.2 Read
      3. 3.15.3 Read Response
    16. 3.16 Operating Mode (36h)
      1. 3.16.1 Read Response
    17. 3.17 PWM Sensitivity (37h)
      1. 3.17.1 Read Response
    18. 3.18 Piccolo Software Secondary Status (38h)
      1. 3.18.1 Read Response
    19. 3.19 Extra Information Keys (39h)
      1. 3.19.1 Read
      2. 3.19.2 Read Response
    20. 3.20 Extra Information Values (3Ah)
      1. 3.20.1 Read
      2. 3.20.2 Read Response
    21. 3.21 Dimming LUT Group and Gamma Index (40h)
      1. 3.21.1 Write
      2. 3.21.2 Read
      3. 3.21.3 Read Response
    22. 3.22 Dimming LUT Group Information (41h)
      1. 3.22.1 Read
      2. 3.22.2 Read Response
    23. 3.23 CMT/Gamma Information (43h)
      1. 3.23.1 Read
      2. 3.23.2 Read Response
    24. 3.24 Command List Address (4Eh)
      1. 3.24.1 Read
      2. 3.24.2 Read Response
    25. 3.25 Generic Command List Type (4Fh)
      1. 3.25.1 Read
      2. 3.25.2 Read Response
    26. 3.26 Command List Numbers (50h)
      1. 3.26.1 Read
      2. 3.26.2 Read Response
    27. 3.27 Read Command Table Info / Execute Command List (51h)
      1. 3.27.1 Write
      2. 3.27.2 Read
      3. 3.27.3 Read Response
    28. 3.28 Front End Video BIST Pixels (53h)
      1. 3.28.1 Write
      2. 3.28.2 Read
      3. 3.28.3 Read Response
    29. 3.29 Front End Video BIST (54h)
      1. 3.29.1 Write
      2. 3.29.2 Read
      3. 3.29.3 Read Response
    30. 3.30 External Video Detect BIST (55h)
      1. 3.30.1 Write
      2. 3.30.2 Read
      3. 3.30.3 Read Response
    31. 3.31 Low Pass Filter Constants (60h)
      1. 3.31.1 Write
      2. 3.31.2 Read
      3. 3.31.3 Read Response
    32. 3.32 Temperature Compensation (61h)
      1. 3.32.1 Write
      2. 3.32.2 Read
      3. 3.32.3 Read Response
    33. 3.33 LED Voltage and Current (62h)
      1. 3.33.1 Read
      2. 3.33.2 Read Response
    34. 3.34 DMD Temperature (63h)
      1. 3.34.1 Read
      2. 3.34.2 Read Response
      3. 3.34.3 Example: K10 Format:
    35. 3.35 Enable Calibration Mode (64h)
      1. 3.35.1 Write
      2. 3.35.2 Read
      3. 3.35.3 Read Response
    36. 3.36 Red LED PWM (65h)
      1. 3.36.1 Write
      2. 3.36.2 Read
      3. 3.36.3 Read Response
    37. 3.37 Green LED PWM (66h)
      1. 3.37.1 Write
      2. 3.37.2 Read
      3. 3.37.3 Read Response
    38. 3.38 Blue LED PWM (67h)
      1. 3.38.1 Write
      2. 3.38.2 Read
      3. 3.38.3 Read Response
    39. 3.39 Current Limit PWM (68h)
      1. 3.39.1 Write
      2. 3.39.2 Read
      3. 3.39.3 Read Response
    40. 3.40 Sensor Gain (69h)
      1. 3.40.1 Write
      2. 3.40.2 Read
      3. 3.40.3 Read Response
    41. 3.41 Command Table Index (6Ah)
      1. 3.41.1 Write
      2. 3.41.2 Read
      3. 3.41.3 Read Response
    42. 3.42 Sensor Gain Map (6Bh)
      1. 3.42.1 Read Response
    43. 3.43 Adapter ADC Voltages (0x6C)
      1. 3.43.1 Read
      2. 3.43.2 Read Response
    44. 3.44 Configuration Format Version (6Dh)
      1. 3.44.1 Read Response
      2. 3.44.2 Description of Configuration Format
    45. 3.45 Calibration Format Version (6Eh)
      1. 3.45.1 Read Response
      2. 3.45.2 Description of Calibration Format
    46. 3.46 Calibration Data Version (6Fh)
      1. 3.46.1 Read Response
    47. 3.47 Program Calibration Data to Flash (70h)
      1. 3.47.1 Write
    48. 3.48 Binary Flash Read/Set Binary Read Start Address (71h)
      1. 3.48.1 Write
      2. 3.48.2 Read
      3. 3.48.3 Read Response
    49. 3.49 Set PWM Period/Read PWM Info (72h)
      1. 3.49.1 Write
      2. 3.49.2 Read
      3. 3.49.3 Read Response
    50. 3.50 PWM Scale Factor (73h)
      1. 3.50.1 Read Response
    51. 3.51 ASIC Flash Read (74h)
      1. 3.51.1 Read Response
    52. 3.52 ASIC Flash Read Setup (75h)
      1. 3.52.1 Write
      2. 3.52.2 Read
      3. 3.52.3 Read Response
    53. 3.53 Power Rail Voltages (0x78)
      1. 3.53.1 Read
      2. 3.53.2 Read Response
    54. 3.54 Voltage Supervision (or Voltage Monitoring) (0x79)
      1. 3.54.1 Write
      2. 3.54.2 Read
      3. 3.54.3 Read Response
    55. 3.55 Toggle Mode (7Ah)
      1. 3.55.1 Read
      2. 3.55.2 Read Response
    56. 3.56 Piccolo IIC Clock Rate (7Ch)
      1. 3.56.1 Write
      2. 3.56.2 Read
      3. 3.56.3 Read Response
    57. 3.57 Piccolo Program Mode (7Eh)
      1. 3.57.1 Read Response
  4. 4Examples
    1. 4.1  Examples
    2. 4.2  Write Backlight 0xFFFF
    3. 4.3  Write Backlight 0xA523 (Special Char in Data)
    4. 4.4  Write Backlight 0xFA5A (Special Char in Data)
    5. 4.5  Write Backlight 0xE96F (Special Char in Checksum)
    6. 4.6  Write Backlight 0x9013 (Special Char in Checksum)
    7. 4.7  Write – Failure – Checksum Mismatch
    8. 4.8  Write – Failure – Invalid Cmd
    9. 4.9  Write – Failure – Command Not Available
    10. 4.10 Write – Failure – Length Mismatch
    11. 4.11 Write – Other Errors
    12. 4.12 Read Backlight
    13. 4.13 Read ASIC Register
    14. 4.14 Read – Failure
  5. 5Writing and Reading a Floating Point Number
    1. 5.1 Writing and Reading a Floating Point Number
    2. 5.2 Example: Writing Floating Point Data (say 1.0):
    3. 5.3 Example: Reading Floating Point Data:
  6. 6Revision History

3.10.1 Read Response

This is the data response for a valid request to read the ASIC BIST results.

ByteDescription
1Response Byte (01h)
2Length (0Dh)
3BIST Results (Refer to Figure 3-3)
4Flash BIST Checksum (lsb)
5Flash BIST Checksum
6Flash BIST Checksum
7Flash BIST Checksum (msb)
8DMD Device ID (lsb)
9DMD Device ID
10DMD Device ID
11DMD Device ID (msb)
12System BIST Checksum (lsb)
13System BIST Checksum
14System BIST Checksum
15System BIST Checksum (msb)
16Checksum (Sum of bytes 1 to 15)
msbByte 1: BIST Resultslsb
b7b6b5b4b3b2b1b0
System BIST ResultDMD JTAG BIST ResultFlash BIST ResultDDR2 BIST Result
b(0:1) -DDR2 BIST Result
00: FAIL
01: PASS
10: Unknown
11: Not Executed
b(2:3) -Flash BIST Result
00: FAIL
01: PASS
10: Unknown
11: Not Executed
b(4:5) -DMD JTAG BIST Result
00: FAIL
01: PASS
10: Unknown
11: Not Executed
b(6:7) -System BIST Result
00: INVALID
01: VALID
10: Unknown
11: Not Executed
Figure 3-3 ASIC BIST Results Byte Format

Note: For more details, refer to the DLPC120-Q1 Programmer's Guide (DLPU055).