DLPU102C
December 2020 – July 2024
1
Trademarks
1
Read This First
1.1
About This Guide
1.2
Related Documentation from Texas Instruments
1.3
If You Need Assistance
2
DLP LightCrafter Dual DLPC900 EVM Overview
2.1
Welcome
2.2
DLP LightCrafter Dual DLPC900 Evaluation Module (EVM) Hardware
2.3
EVM Board
2.4
Other Items Needed for Operation
2.5
DLP LightCrafter Dual DLPC900 Connections
2.5.1
DLP LightCrafter Dual DLPC900 LED Enable and PWM Outputs
2.5.2
DLP LightCrafter Dual DLPC900 Trigger Input and Output Voltage Selectors
2.6
DLP LightCrafter Dual DLPC900 EVM Flex Cable
2.7
DLP LightCrafter Dual DLPC900 EVM and DMD EVM Assembly
3
Quick Start
3.1
Power-up the DLP LightCrafter Dual DLPC900 EVM
3.2
Creating A Simple Pattern Sequence
4
Operating the DLP LightCrafter Dual DLPC900 EVM
4.1
DLP LightCrafter Dual DLPC900 Control Software
4.2
PC Software
4.3
System Common Controls
4.3.1
Operating Mode
4.3.2
Connected DMD Type
4.3.3
EVM Information
4.3.4
Status
4.4
System Settings
4.5
Video Mode
4.5.1
Video Support
4.6
Pattern Modes
4.6.1
Menu Bar
4.6.2
Creating a Pattern Sequence in Pattern On-The-Fly Mode
4.6.3
Creating a Pattern Sequence in Pre-Stored Pattern Mode
4.6.4
Reordering a Pattern Sequence using the Edit LUT Feature
4.6.4.1
Special Considerations for Input Triggers When Using the Edit LUT Feature
4.6.5
Creating a Pattern Sequence in Video Pattern Mode
4.6.6
Creating a Pattern Sequence With DMD Block Load
4.6.7
Pattern Settings
4.7
Batch Files
4.7.1
Execute Batch File
4.7.2
Creating and Saving Batch Files
4.7.2.1
Creating and Saving a Batch File Using the GUI
4.7.2.2
Creating a Batch File Using a Text Editor
4.7.3
Loading a Batch File
4.7.4
Adding a Batch File to the Firmware
4.8
Peripherals Panel
4.8.1
Peripherals Tab
4.8.2
Debug Tab
4.9
Firmware
4.9.1
Adding or Removing Patterns from the Firmware
4.9.1.1
Deleting Images
4.9.1.2
Adding Images
4.9.1.3
Adding Both Images and Batch Files
4.10
Reprogram Controller Board for a Different Supported DMD
4.11
Flash Device Parameters
4.12
JTAG Flash Programming
4.13
Programming an EDID
4.14
Intel (Altera) FPGA Programming
5
Connectors
5.1
Input Trigger Connectors
5.2
Output Trigger Connectors
5.3
DLPC900 UART Headers
5.4
DLPC900 I2C Port 0
5.5
DLPC900 I2C Port 1
5.6
DLPC900 I2C Port 2
5.7
JTAG Boundary Scan
5.8
GPIO and PWM
5.9
Power
5.10
External Parallel Video Connector
6
Power Supply Requirements
6.1
External Power Supply Requirements
7
Safety
7.1
Caution Labels
8
Revision History
7
Safety