DLPU114A August 2024 – November 2024 DLPC8445
A separate controller pin (HOST_IRQ) reports to the host component that the controller is busy or not busy. Upon power-on-reset, the front-end communication device must wait until the signal goes to a HIGH state. A signal that remains LOW continuously indicates a problem with the controller boot-sequence. The source of the problem must be resolve before proceeding.
When a command is sent, HOST_IRQ is pulled LOW until the command completes execution. If the user attempts to send another command while execution of the first command is ongoing, application processor should confirm whether HOST_IRQ is HIGH or LOW and then takes the decision to send the command accordingly. This process ensures that there is no clock stretching, and other devices on the I2C bus are not affected, but it ensures that the command handler is occupied and no other command can be sent at this point.