DLPU124 june 2023
On the DLPLCRC910EVM the trigger input for the DLPC910 is mediated through the Apps FPGA.
Connecting header J3 APPS_TSTPT7 (Pin 2) to J3 APPS_TSTPT6 (Pin 3) allows the use of SW5 on the AMD Xilinx VC-707 board (lower right corner) to advance patterns when pressed.