DLPU124 june   2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Overview
  5. 2 If You Need Assistance
  6. 3 DLP LightCrafter DLPC910 EVM (DLPLCRC910EVM) Overview
    1. 3.1  Welcome
    2. 3.2  DLP LightCrafter DLPC910 Evaluation Module (DLPLCRC910EVM) Hardware
    3. 3.3  DLPLCRC910EVM Board
    4. 3.4  Other Items Needed for Operation
    5. 3.5  DLPLCRC910EVM Connections
    6. 3.6  DLP LightCrafter DLPC910 LEDs
    7. 3.7  Apps FPGA Trigger Input
    8. 3.8  DLPLCRC910EVM HPC FMC Cables
    9. 3.9  DLPLCRC910EVM and DMD EVM Assembly
    10. 3.10 Connecting an Apps FPGA Board to the DLPLCRC910EVM
  7. 4 Quick Start
    1. 4.1 Power-up the DLPLCRC910EVM
    2. 4.2 Power-down the DLPLCRC910EVM
  8. 5 Operating the DLPLCRC910EVM
    1. 5.1 DLPLCRC910EVM GUI and Apps FPGA Software
    2. 5.2 PC Software
      1. 5.2.1 Menu Bar
      2. 5.2.2 Icon Bar
      3. 5.2.3 Main Window
        1. 5.2.3.1 Script Commands sub-window
          1. 5.2.3.1.1 Load Tab
          2. 5.2.3.1.2 Reset Tab
          3. 5.2.3.1.3 Clear Tab
          4. 5.2.3.1.4 Float Tab
          5. 5.2.3.1.5 Control Tab
        2. 5.2.3.2 Script Sub-Window
        3. 5.2.3.3 Status Sub-Window
      4. 5.2.4 DLPC910 Registers
        1. 5.2.4.1 Status/Control Tab
          1. 5.2.4.1.1 Status Items
          2. 5.2.4.1.2 DMD Control Items
          3. 5.2.4.1.3 Design Items
        2. 5.2.4.2 Register List Tab
          1. 5.2.4.2.1  DESTOP_INTERRUPT_CLEAR - 0x0000
          2. 5.2.4.2.2  DESTOP_INTERRUPT_SET - 0x0004
          3. 5.2.4.2.3  DESTOP_INTERRUPT_ENABLE - 0x0008
          4. 5.2.4.2.4  MAIN_STATUS (DLPC910) - 0x000C
          5. 5.2.4.2.5  DESTOP_CAL - 0x0010
          6. 5.2.4.2.6  DESTOP_DMD_ID_REG - 0x0014
          7. 5.2.4.2.7  DESTOP_CATBITS_REG - 0x0018
          8. 5.2.4.2.8  DESTOP_910VERSION_REG - 0x001C
          9. 5.2.4.2.9  DESTOP_RESET_REG - 0x0020
          10. 5.2.4.2.10 DESTOP_INFIFO_STATUS - 0x0024
          11. 5.2.4.2.11 DESTOP_BUS_SWAP - 0x0028
          12. 5.2.4.2.12 DESTOP_DMDCTRL - 0x002C
          13. 5.2.4.2.13 DESTOP_BIT_FLIP - 0x0030
        3. 5.2.4.3 Settings Tab
      5. 5.2.5 Apps FPGA Registers
        1. 5.2.5.1 Status/Control Tab
          1. 5.2.5.1.1 Status Items
          2. 5.2.5.1.2 PBC Control Items
          3. 5.2.5.1.3 Row/Block Operations Items
          4. 5.2.5.1.4 Test Pattern Items
        2. 5.2.5.2 Apps Registers Tab
          1. 5.2.5.2.1  APPS_INTERRUPT_CLEAR - 0x0000
          2. 5.2.5.2.2  APPS_INTERRUPT_SET - 0x0004
          3. 5.2.5.2.3  APPS_INTERRUPT_ENABLE - 0x0008
          4. 5.2.5.2.4  MAIN_STATUS (Apps) - 0x000C
          5. 5.2.5.2.5  APPS_CNTRL - 0x0010
          6. 5.2.5.2.6  APPSTOP_PATTERNSEL - 0x0014
          7. 5.2.5.2.7  APPSTOP_TEST_ROWADDR - 0x0018
          8. 5.2.5.2.8  APPSTOP_LOADER_RESET_TYPE - 0x001C
          9. 5.2.5.2.9  DMD_TYPEREG - 0x0020
          10. 5.2.5.2.10 APPS_BUFFER_WSTART - 0x0024
          11. 5.2.5.2.11 APPS_FIFO_BURST - 0x0028
          12. 5.2.5.2.12 APPS_ROW_CTRL - 0x002C
          13. 5.2.5.2.13 APPS_BLK_CTRL - 0x0030
          14. 5.2.5.2.14 APPS_ROW_LOADER - 0x0034
          15. 5.2.5.2.15 APPS_LOAD_TRIG_INTERVAL - 0x0038
          16. 5.2.5.2.16 APPS_EXPOSE_TIME - 0x003C
          17. 5.2.5.2.17 APPS_LOADER_CTRL - 0x0040
          18. 5.2.5.2.18 APPS_DMD_PARK - 0x0044
          19. 5.2.5.2.19 APPS_EXT_RST_EVT - 0x0048
          20. 5.2.5.2.20 APPS_BUILD_DATE - 0x0080
          21. 5.2.5.2.21 APPS_VERSION - 0x0084
          22. 5.2.5.2.22 APPS_FIXED_ID - 0x0088
          23. 5.2.5.2.23 APPS_GPIF_TEST - 0x008C
    3. 5.3 JTAG Flash Programming
    4. 5.4 SPI Flash Programming
    5. 5.5 AMD Xilinx VC-707 Configuration PROM Programming
    6. 5.6 USB Firmware Programming
  9. 6 Connectors
    1. 6.1  J1 - USB - Micro B USB 2.0 Connector
    2. 6.2  J2 - DLPC910 I2C Connector
    3. 6.3  J4 - PMBUS (I2C) Connector
    4. 6.4  J6 - USB GPIO Connector
    5. 6.5  J8 - 400 Position FMC Connector (Female)
    6. 6.6  J14 - Power (Alternate)
    7. 6.7  J15 - Power
    8. 6.8  J17 - JTAG Boundary Scan Connector
    9. 6.9  J18 - SPI Programming Connector
    10. 6.10 J19, J20, and J21 - Fan Connectors
    11. 6.11 J500, J501 - FMC Connector (Male)
  10. 7 DLPLCRC910EVM Power Supply Requirements
    1. 7.1 External Power Supply Requirements
  11. 8 Related Documentation from Texas Instruments
  12. 9 Abbreviations and Acronyms
  13. 10Safety
    1. 10.1 Caution Labels

3.2 DLP LightCrafter DLPC910 Evaluation Module (DLPLCRC910EVM) Hardware

The DLPLCRC910EVM is one third of a complete DMD imaging electronics subsystem. The DLP LightCrafter DLPC910 EVM (DLPLCRC910EVM) consists of the DLPC910 board which includes a DLPC910 Digital Controller, a USB interface, power management circuits, and supporting digital logic.

Also needed to complete the imaging subsystem is a compatible DLP LightCrafter DMD EVM which is compatible with the DLPLCRC910EVM and an Apps FPGA board or other front end to send patterns to the DLPC910 controller. A DMD EVM consists of a DMD, a DMD board (PCB) containing on-board DMD power circuits, DMD mounting hardware when necessary, and a high pin count (HPC) FPGA mezzanine connector (FMC) cable for connections to the DLPC910 board.

Figure 3-1- block diagram outlining the major components of the DLPLCRC910EVM System Hardware.

GUID-20230330-SS0I-DQSH-CFZR-MX47CLP1BC59-low.svg Figure 3-1 DLPLCRC910EVM Hardware Components