Address |
BITS |
Description |
Default |
R/W |
0x002C |
(31:29) |
Not used |
zeros |
R/W |
28 |
F1S(1) |
0 |
R/W |
27 |
Not used |
0 |
R/W |
(26:16) |
Numrows(2)(3) |
1 |
R/W |
15 |
Not used |
0 |
R/W |
(14:4) |
ROWAD(2)(3) |
0x000 |
R/W |
(3:2) |
Not used |
“00” |
R/W |
(1:0) |
ROWMD(2)(3) |
“00” |
R/W |
(1) When F1S is ‘1’ (F1S = force
ones), all 1’s data is sent to the DLPC910 for the given row cycles.
(2) ROWMD has the following effect on
user image buffer reads:
- “00” – no action.
- “01” – increments buffer
read address counter then sends addressed buffer row data to DMD.
Continues this until numrows (bits 26:16) have been sent.
- “10” – loads apps DLP
ROWAD counter with ROWAD. Sends ROWAD to DLPC910. Loads buffer read
address counter with ROWAD. Sends addressed buffer row to DLPC910.
- “11” – Sends ROWAD =
zeros to DLPC910. Clears buffer read address counter to zeros. Sends
buffer row 0 data to DLPC910.
(3) The User Row Command
register is used to move data from the user image buffer to the DMD. When the
register is written, ROWMD and ROWAD are forwarded to the DLPC910 controller
along with data read from the user image buffer. Additional details on the
function of these row control signals can be found in the DLPC910 data sheet.
Apps FPGA continuously sends no-op row
commands to the DLPC910 controller when the controller is not responding to writes
to this register.