Address |
BITS |
Description |
Default |
R/W |
0x0030 |
(31:9) |
Not used |
zeros |
R/W |
8 |
RST2BLKZ(1) |
1 |
R/W |
(7:4) |
BLKAD(1) |
0x0 |
R/W |
(3:2) |
Not used |
zeros |
R/W |
(1:0) |
BLKMD(1) |
“00” |
R/W |
(1) Writing to the user block command
register instructs apps FPGA to forward the block command in this register to
the DLPC910 controller. Block command details are described in the DLPC910 data
sheet. Forwarded block commands include the appropriate synchronization with
DCLK and DVALID.